| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | ConstrainedOps.def | 78 FUNCTION(rint, 1, 1, experimental_constrained_rint, FRINT)
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 642 FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR, enumerator
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| D | BasicTTIImpl.h | 1275 ISDs.push_back(ISD::FRINT);
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCTargetTransformInfo.cpp | 315 case Intrinsic::rint: Opcode = ISD::FRINT; break; in mightUseCTR()
376 Opcode = ISD::FRINT; break; in mightUseCTR()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SchedA57.td | 489 def : InstRW<[A57Write_5cyc_1V], (instregex "^FRINT[AIMNPXZ](v2f32)")>;
491 def : InstRW<[A57Write_5cyc_2V], (instregex "^FRINT[AIMNPXZ](v4f32|v2f64)")>;
562 def : InstRW<[A57Write_5cyc_1V], (instregex "^FRINT.+r")>;
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| D | AArch64SchedFalkorDetails.td | 592 def : InstRW<[FalkorWr_1VXVY_2cyc], (instregex "^FRINT(A|I|M|N|P|X|Z)v2f32$")>;
617 def : InstRW<[FalkorWr_2VXVY_2cyc], (instregex "^FRINT(A|I|M|N|P|X|Z)(v2f64|v4f32)$")>;
1123 def : InstRW<[FalkorWr_1VXVY_2cyc], (instregex "^FRINT(A|I|M|N|P|X|Z)(S|D)r$")>;
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| D | AArch64SchedExynosM3.td | 541 def : InstRW<[M3WriteFCVT3A], (instregex "^FRINT.+r")>;
656 def : InstRW<[M3WriteFCVT3A], (instregex "^FRINT[AIMNPXZ]v")>;
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| D | AArch64SchedExynosM5.td | 711 def : InstRW<[M5WriteFCVT3A], (instregex "^FRINT.+r")>;
835 def : InstRW<[M5WriteFCVT3A], (instregex "^FRINT[AIMNPXZ]v")>;
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| D | AArch64SchedExynosM4.td | 652 def : InstRW<[M4WriteFCVT3A], (instregex "^FRINT.+r")>;
797 def : InstRW<[M4WriteFCVT3A], (instregex "^FRINT[AIMNPXZ]v")>;
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| D | AArch64SchedThunderX2T99.td | 1185 (instregex "^FRINT(A|I|M|N|P|X|Z)(Sr|Dr)")>;
1406 (instregex "^FRINT[AIMNPXZ](v2f32)")>;
1409 (instregex "^FRINT[AIMNPXZ](v4f32|v2f64)")>;
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| D | AArch64SchedKryoDetails.td | 963 (instregex "FRINT(A|I|M|N|P|X|Z)(S|D)r")>;
969 (instregex "FRINT(A|I|M|N|P|X|Z)v2f32")>;
975 (instregex "FRINT(A|I|M|N|P|X|Z)(v2f64|v4f32)")>;
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| D | AArch64SchedCyclone.td | 575 // FRINT(AIMNPXZ) V,V
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| D | AArch64ISelLowering.cpp | 268 setOperationAction(ISD::FRINT, MVT::f128, Expand); in AArch64TargetLowering()
449 setOperationAction(ISD::FRINT, MVT::f16, Promote); in AArch64TargetLowering()
479 setOperationAction(ISD::FRINT, MVT::v4f16, Expand); in AArch64TargetLowering()
494 setOperationAction(ISD::FRINT, MVT::v8f16, Expand); in AArch64TargetLowering()
510 setOperationAction(ISD::FRINT, Ty, Legal); in AArch64TargetLowering()
527 setOperationAction(ISD::FRINT, MVT::f16, Legal); in AArch64TargetLowering()
719 setOperationAction(ISD::FRINT, MVT::v1f64, Expand); in AArch64TargetLowering()
834 setOperationAction(ISD::FRINT, Ty, Legal); in AArch64TargetLowering()
844 setOperationAction(ISD::FRINT, Ty, Legal); in AArch64TargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 207 case ISD::FRINT: return "frint"; in getOperationName()
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| D | LegalizeFloatTypes.cpp | 113 case ISD::FRINT: R = SoftenFloatRes_FRINT(N); break; in SoftenFloatResult()
1170 case ISD::FRINT: ExpandFloatRes_FRINT(N, Lo, Hi); break; in ExpandFloatResult()
2118 case ISD::FRINT: in PromoteFloatResult()
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| D | LegalizeVectorOps.cpp | 431 case ISD::FRINT: in LegalizeOp()
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| D | LegalizeVectorTypes.cpp | 94 case ISD::FRINT: in ScalarizeVectorResult()
888 case ISD::FRINT: in SplitVectorResult()
2814 case ISD::FRINT: in WidenVectorResult()
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| D | LegalizeDAG.cpp | 4019 case ISD::FRINT: in ConvertNodeToLibcall()
4503 case ISD::FRINT: in PromoteNode()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 99 {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, ISD::FRINT}) in WebAssemblyTargetLowering()
194 ISD::FEXP, ISD::FEXP2, ISD::FRINT}) { in WebAssemblyTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 256 setOperationAction(ISD::FRINT, MVT::f32, Legal); in AMDGPUTargetLowering()
421 setOperationAction(ISD::FRINT, VT, Expand); in AMDGPUTargetLowering()
524 case ISD::FRINT: in fnegFoldsIntoOp()
1138 case ISD::FRINT: return LowerFRINT(Op, DAG); in LowerOperation()
2159 return DAG.getNode(ISD::FRINT, SDLoc(Op), Op.getValueType(), Op.getOperand(0)); in LowerFNEARBYINT()
3807 case ISD::FRINT: in performFNegCombine()
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| D | R600ISelLowering.cpp | 158 setOperationAction(ISD::FRINT, MVT::f64, Custom); in R600TargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 148 setOperationAction(ISD::FRINT, MVT::f16, Promote); in MipsSETargetLowering()
394 setOperationAction(ISD::FRINT, Ty, Legal); in addMSAFloatType()
1918 return DAG.getNode(ISD::FRINT, DL, Op->getValueType(0), Op->getOperand(1)); in lowerINTRINSIC_WO_CHAIN()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 753 setOperationAction(ISD::FRINT, VT, Expand); in initActions()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 906 case ISD::FRINT: in PreprocessISelDAG()
922 case ISD::FRINT: Imm = 0x4; break; in PreprocessISelDAG()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 445 setOperationAction(ISD::FRINT, VT, Legal); in SystemZTargetLowering()
505 setOperationAction(ISD::FRINT, MVT::v2f64, Legal); in SystemZTargetLowering()
537 setOperationAction(ISD::FRINT, MVT::v4f32, Legal); in SystemZTargetLowering()
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