| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | ConstrainedOps.def | 80 FUNCTION(sin, 1, 1, experimental_constrained_sin, FSIN)
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 640 FNEG, FABS, FSQRT, FCBRT, FSIN, FCOS, FPOWI, FPOW, enumerator
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| D | BasicTTIImpl.h | 1223 ISDs.push_back(ISD::FSIN);
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 196 case ISD::FSIN: return "fsin"; in getOperationName()
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| D | LegalizeFloatTypes.cpp | 117 case ISD::FSIN: R = SoftenFloatRes_FSIN(N); break; in SoftenFloatResult()
1174 case ISD::FSIN: ExpandFloatRes_FSIN(N, Lo, Hi); break; in ExpandFloatResult()
2120 case ISD::FSIN: in PromoteFloatResult()
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| D | LegalizeDAG.cpp | 2259 unsigned OtherOpcode = Node->getOpcode() == ISD::FSIN in useSinCos()
2260 ? ISD::FCOS : ISD::FSIN; in useSinCos()
3192 case ISD::FSIN: in ExpandNode()
3960 case ISD::FSIN: in ConvertNodeToLibcall()
4509 case ISD::FSIN: in PromoteNode()
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| D | LegalizeVectorOps.cpp | 420 case ISD::FSIN: in LegalizeOp()
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| D | LegalizeVectorTypes.cpp | 96 case ISD::FSIN: in ScalarizeVectorResult()
890 case ISD::FSIN: in SplitVectorResult()
2816 case ISD::FSIN: in WidenVectorResult()
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| D | TargetLowering.cpp | 5590 case ISD::FSIN: in isNegatibleForFree()
5713 case ISD::FSIN: in getNegatedExpression()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 145 setOperationAction(ISD::FSIN, MVT::f32, Custom); in R600TargetLowering()
488 case ISD::FSIN: return LowerTrig(Op, DAG); in LowerOperation()
775 case ISD::FSIN: in LowerTrig()
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| D | AMDGPUISelLowering.cpp | 424 setOperationAction(ISD::FSIN, VT, Expand); in AMDGPUTargetLowering()
522 case ISD::FSIN: in fnegFoldsIntoOp()
3809 case ISD::FSIN: in performFNegCombine()
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| D | SIISelLowering.cpp | 441 setOperationAction(ISD::FSIN, MVT::f32, Custom); in SITargetLowering()
503 setOperationAction(ISD::FSIN, MVT::f16, Promote); in SITargetLowering()
4048 case ISD::FSIN: in LowerOperation()
7993 case ISD::FSIN: in LowerTrig()
8607 case ISD::FSIN: in fp16SrcZerosHighBits()
8801 case ISD::FSIN: in isCanonicalized()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ScheduleAtom.td | 891 def : InstRW<[AtomWrite01_174], (instrs FSINCOS, FSIN, FCOS)>;
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| D | X86InstrFPStack.td | 746 def FSIN : I<0xD9, MRM_FE, (outs), (ins), "fsin", []>;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1616 setOperationAction(ISD::FSIN , MVT::f128, Expand); in SparcTargetLowering()
1621 setOperationAction(ISD::FSIN , MVT::f64, Expand); in SparcTargetLowering()
1626 setOperationAction(ISD::FSIN , MVT::f32, Expand); in SparcTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 269 setOperationAction(ISD::FSIN, MVT::f128, Expand); in AArch64TargetLowering()
386 setOperationAction(ISD::FSIN, MVT::f32, Expand); in AArch64TargetLowering()
387 setOperationAction(ISD::FSIN, MVT::f64, Expand); in AArch64TargetLowering()
411 setOperationAction(ISD::FSIN, MVT::f16, Promote); in AArch64TargetLowering()
412 setOperationAction(ISD::FSIN, MVT::v4f16, Expand); in AArch64TargetLowering()
413 setOperationAction(ISD::FSIN, MVT::v8f16, Expand); in AArch64TargetLowering()
720 setOperationAction(ISD::FSIN, MVT::v1f64, Expand); in AArch64TargetLowering()
879 setOperationAction(ISD::FSIN, VT, Expand); in addTypeForNEON()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 94 {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, ISD::FREM, ISD::FMA}) in WebAssemblyTargetLowering()
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| /third_party/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 765 #define FSIN CHOICE(fsin, fsin, fsin) macro
1478 #define FSIN fsin macro
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1437 {ISD::FDIV, ISD::FREM, ISD::FSQRT, ISD::FSIN, ISD::FCOS, ISD::FSINCOS, in HexagonTargetLowering()
1482 ISD::FREM, ISD::FNEG, ISD::FABS, ISD::FSQRT, ISD::FSIN, in HexagonTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 349 setOperationAction(ISD::FSIN, VT, Expand); in addMVEVectorTypes()
797 setOperationAction(ISD::FSIN, MVT::v2f64, Expand); in ARMTargetLowering()
818 setOperationAction(ISD::FSIN, MVT::v4f32, Expand); in ARMTargetLowering()
834 setOperationAction(ISD::FSIN, MVT::v2f32, Expand); in ARMTargetLowering()
963 setOperationAction(ISD::FSIN, MVT::f64, Expand); in ARMTargetLowering()
1323 setOperationAction(ISD::FSIN, MVT::f64, Expand); in ARMTargetLowering()
1324 setOperationAction(ISD::FSIN, MVT::f32, Expand); in ARMTargetLowering()
1407 setOperationAction(ISD::FSIN, MVT::f16, Promote); in ARMTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 434 setOperationAction(ISD::FSIN, MVT::f32, Expand); in MipsTargetLowering()
435 setOperationAction(ISD::FSIN, MVT::f64, Expand); in MipsTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 273 setOperationAction(ISD::FSIN , MVT::f64, Expand); in PPCTargetLowering()
278 setOperationAction(ISD::FSIN , MVT::f32, Expand); in PPCTargetLowering()
649 setOperationAction(ISD::FSIN, VT, Expand); in PPCTargetLowering()
942 setOperationAction(ISD::FSIN , MVT::f128, Expand); in PPCTargetLowering()
1004 setOperationAction(ISD::FSIN , MVT::v4f64, Expand); in PPCTargetLowering()
1049 setOperationAction(ISD::FSIN , MVT::v4f32, Expand); in PPCTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 457 def fsin : SDNode<"ISD::FSIN" , SDTFPUnaryOp>;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.cpp | 164 ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, ISD::FREM, ISD::FP16_TO_FP, in RISCVTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 572 for (const auto &Op : {ISD::FDIV, ISD::FREM, ISD::FSQRT, ISD::FSIN, ISD::FCOS, in NVPTXTargetLowering()
|