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Searched refs:InLo (Results 1 – 4 of 4) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonISelLoweringHVX.cpp909 SDValue InLo = DAG.getNode(ISD::CONCAT_VECTORS, dl, VecTy, {SubV, V1}); in insertHvxSubvectorReg() local
911 return DAG.getNode(ISD::SELECT, dl, VecTy, PickHi, InHi, InLo); in insertHvxSubvectorReg()
956 SDValue InLo = DAG.getNode(ISD::CONCAT_VECTORS, dl, VecTy, {SingleV, V1}); in insertHvxSubvectorReg() local
958 return DAG.getNode(ISD::SELECT, dl, VecTy, PickHi, InHi, InLo); in insertHvxSubvectorReg()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorTypes.cpp1225 SDValue InLo, InHi; in SplitVecRes_ExtVecInRegOp() local
1228 GetSplitVector(N0, InLo, InHi); in SplitVecRes_ExtVecInRegOp()
1230 std::tie(InLo, InHi) = DAG.SplitVectorOperand(N, 0); in SplitVecRes_ExtVecInRegOp()
1232 EVT InLoVT = InLo.getValueType(); in SplitVecRes_ExtVecInRegOp()
1251 InHi = DAG.getVectorShuffle(InLoVT, dl, InLo, DAG.getUNDEF(InLoVT), SplitHi); in SplitVecRes_ExtVecInRegOp()
1253 Lo = DAG.getNode(Opcode, dl, OutLoVT, InLo); in SplitVecRes_ExtVecInRegOp()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp1288 SDValue InLo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, In, in initAccumulator() local
1292 return DAG.getNode(MipsISD::MTLOHI, DL, MVT::Untyped, InLo, InHi); in initAccumulator()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.cpp20045 SDValue InLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v8i16, In, in LowerTRUNCATE() local
20049 return DAG.getNode(X86ISD::PACKUS, DL, VT, InLo, InHi); in LowerTRUNCATE()