| /third_party/flutter/skia/src/core/ |
| D | Sk4px.h | 49 static Sk4px Load1(const SkPMColor px[1]) { in Load1() function
133 fn(Load1(src)).store1(dst); in MapSrc()
163 fn(Load1(dst), Load1(src)).store1(dst); in MapDstSrc()
193 fn(Load1(dst), Sk16b(*a)).store1(dst); in MapDstAlpha()
225 fn(Load1(dst), Load1(src), Sk16b(*a)).store1(dst); in MapDstSrcAlpha()
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| /third_party/skia/src/core/ |
| D | Sk4px.h | 49 static Sk4px Load1(const SkPMColor px[1]) { in Load1() function
133 fn(Load1(src)).store1(dst); in MapSrc()
163 fn(Load1(dst), Load1(src)).store1(dst); in MapDstSrc()
193 fn(Load1(dst), Sk16b(*a)).store1(dst); in MapDstAlpha()
225 fn(Load1(dst), Load1(src), Sk16b(*a)).store1(dst); in MapDstSrcAlpha()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrInfo.h | 381 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
392 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1,
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| D | X86InstrInfo.cpp | 5746 X86InstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
5748 if (!Load1->isMachineOpcode() || !Load2->isMachineOpcode()) in areLoadsFromSameBasePtr()
5750 unsigned Opc1 = Load1->getMachineOpcode(); in areLoadsFromSameBasePtr()
5921 return Load1->getOperand(I) == Load2->getOperand(I); in areLoadsFromSameBasePtr()
5934 auto Disp1 = dyn_cast<ConstantSDNode>(Load1->getOperand(X86::AddrDisp)); in areLoadsFromSameBasePtr()
5944 bool X86InstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, in shouldScheduleLoadsNear() argument
5951 unsigned Opc1 = Load1->getMachineOpcode(); in shouldScheduleLoadsNear()
5966 EVT VT = Load1->getValueType(0); in shouldScheduleLoadsNear()
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| D | X86ISelLowering.cpp | 41284 SDValue Load1 = in combineLoad() local
41292 Load1.getValue(1), Load2.getValue(1)); in combineLoad()
41294 SDValue NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl, RegVT, Load1, Load2); in combineLoad()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 245 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
256 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
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| D | ARMBaseInstrInfo.cpp | 1835 bool ARMBaseInstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
1841 if (!Load1->isMachineOpcode() || !Load2->isMachineOpcode()) in areLoadsFromSameBasePtr()
1844 switch (Load1->getMachineOpcode()) { in areLoadsFromSameBasePtr()
1886 if (Load1->getOperand(0) != Load2->getOperand(0) || in areLoadsFromSameBasePtr()
1887 Load1->getOperand(4) != Load2->getOperand(4)) in areLoadsFromSameBasePtr()
1891 if (Load1->getOperand(3) != Load2->getOperand(3)) in areLoadsFromSameBasePtr()
1895 if (isa<ConstantSDNode>(Load1->getOperand(1)) && in areLoadsFromSameBasePtr()
1897 Offset1 = cast<ConstantSDNode>(Load1->getOperand(1))->getSExtValue(); in areLoadsFromSameBasePtr()
1916 bool ARMBaseInstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, in shouldScheduleLoadsNear() argument
1932 if ((Load1->getMachineOpcode() != Load2->getMachineOpcode()) && in shouldScheduleLoadsNear()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 1218 virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
1232 virtual bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, in shouldScheduleLoadsNear() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 146 bool SIInstrInfo::areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, in areLoadsFromSameBasePtr() argument
149 if (!Load0->isMachineOpcode() || !Load1->isMachineOpcode()) in areLoadsFromSameBasePtr()
153 unsigned Opc1 = Load1->getMachineOpcode(); in areLoadsFromSameBasePtr()
162 if (getNumOperandsNoGlue(Load0) != getNumOperandsNoGlue(Load1)) in areLoadsFromSameBasePtr()
166 if (Load0->getOperand(0) != Load1->getOperand(0)) in areLoadsFromSameBasePtr()
184 Offset1 = cast<ConstantSDNode>(Load1->getOperand(Offset1Idx))->getZExtValue(); in areLoadsFromSameBasePtr()
194 assert(getNumOperandsNoGlue(Load0) == getNumOperandsNoGlue(Load1)); in areLoadsFromSameBasePtr()
197 if (Load0->getOperand(0) != Load1->getOperand(0)) in areLoadsFromSameBasePtr()
203 dyn_cast<ConstantSDNode>(Load1->getOperand(1)); in areLoadsFromSameBasePtr()
217 if (!nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::soffset) || in areLoadsFromSameBasePtr()
[all …]
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| D | SIInstrInfo.h | 180 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,
193 bool shouldScheduleLoadsNear(SDNode *Load0, SDNode *Load1, int64_t Offset0,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLoweringHVX.cpp | 1508 SDValue Load1 = DAG.getLoad(SingleTy, dl, Chain, Base1, MOp1); in SplitHvxMemOp() local
1510 { DAG.getNode(ISD::CONCAT_VECTORS, dl, MemTy, Load0, Load1), in SplitHvxMemOp()
1512 Load0.getValue(1), Load1.getValue(1)) }, dl); in SplitHvxMemOp()
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| D | HexagonISelLowering.cpp | 2789 SDValue Load1 = DAG.getLoad(LoadTy, dl, Chain, Base1, WideMMO); in LowerUnalignedLoad() local
2792 {Load1, Load0, BaseNoOff.getOperand(0)}); in LowerUnalignedLoad()
2794 Load0.getValue(1), Load1.getValue(1)); in LowerUnalignedLoad()
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