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Searched refs:MemVT (Results 1 – 25 of 34) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.h853 bool mergeStoresAfterLegalization(EVT MemVT) const override { in mergeStoresAfterLegalization() argument
854 return !MemVT.isVector(); in mergeStoresAfterLegalization()
857 bool canMergeStoresTo(unsigned AddressSpace, EVT MemVT,
1176 bool storeOfVectorConstantIsCheap(EVT MemVT, unsigned NumElem, in storeOfVectorConstantIsCheap() argument
1544 SDVTList VTs, EVT MemVT, in X86StoreSDNode() argument
1546 :MemSDNode(Opcode, Order, dl, VTs, MemVT, MMO) {} in X86StoreSDNode()
1562 const DebugLoc &dl, SDVTList VTs, EVT MemVT, in X86MaskedStoreSDNode() argument
1564 : MemSDNode(Opcode, Order, dl, VTs, MemVT, MMO) {} in X86MaskedStoreSDNode()
1580 SDVTList VTs, EVT MemVT, MachineMemOperand *MMO) in TruncSStoreSDNode() argument
1581 : X86StoreSDNode(X86ISD::VTRUNCSTORES, Order, dl, VTs, MemVT, MMO) {} in TruncSStoreSDNode()
[all …]
DX86ISelDAGToDAG.cpp1065 MVT MemVT = (N->getOpcode() == ISD::FP_ROUND) ? DstVT : SrcVT; in PreprocessISelDAG() local
1066 SDValue MemTmp = CurDAG->CreateStackTemporary(MemVT); in PreprocessISelDAG()
1072 MemTmp, MachinePointerInfo(), MemVT); in PreprocessISelDAG()
1074 MachinePointerInfo(), MemVT); in PreprocessISelDAG()
1118 MVT MemVT = (N->getOpcode() == ISD::STRICT_FP_ROUND) ? DstVT : SrcVT; in PreprocessISelDAG() local
1119 SDValue MemTmp = CurDAG->CreateStackTemporary(MemVT); in PreprocessISelDAG()
1129 Store = CurDAG->getMemIntrinsicNode(X86ISD::FST, dl, VTs, Ops, MemVT, in PreprocessISelDAG()
1138 assert(SrcVT == MemVT && "Unexpected VT!"); in PreprocessISelDAG()
1146 Result = CurDAG->getMemIntrinsicNode(X86ISD::FLD, dl, VTs, Ops, MemVT, in PreprocessISelDAG()
1155 assert(DstVT == MemVT && "Unexpected VT!"); in PreprocessISelDAG()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DTargetLowering.h445 virtual bool storeOfVectorConstantIsCheap(EVT MemVT, in storeOfVectorConstantIsCheap() argument
454 virtual bool mergeStoresAfterLegalization(EVT MemVT) const { in mergeStoresAfterLegalization() argument
459 virtual bool canMergeStoresTo(unsigned AS, EVT MemVT, in canMergeStoresTo() argument
1065 EVT MemVT) const { in getLoadExtAction() argument
1066 if (ValVT.isExtended() || MemVT.isExtended()) return Expand; in getLoadExtAction()
1068 unsigned MemI = (unsigned) MemVT.getSimpleVT().SimpleTy; in getLoadExtAction()
1076 bool isLoadExtLegal(unsigned ExtType, EVT ValVT, EVT MemVT) const { in isLoadExtLegal() argument
1077 return getLoadExtAction(ExtType, ValVT, MemVT) == Legal; in isLoadExtLegal()
1082 bool isLoadExtLegalOrCustom(unsigned ExtType, EVT ValVT, EVT MemVT) const { in isLoadExtLegalOrCustom() argument
1083 return getLoadExtAction(ExtType, ValVT, MemVT) == Legal || in isLoadExtLegalOrCustom()
[all …]
DSelectionDAGNodes.h1429 EVT MemVT, MachineMemOperand *MMO)
1430 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
2193 SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT,
2195 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
2227 ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT,
2229 : LSBaseSDNode(ISD::LOAD, Order, dl, VTs, AM, MemVT, MMO) {
2255 ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT,
2257 : LSBaseSDNode(ISD::STORE, Order, dl, VTs, AM, MemVT, MMO) {
2288 ISD::MemIndexedMode AM, EVT MemVT,
2290 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
[all …]
DSelectionDAG.h1050 SDValue getAtomicCmpSwap(unsigned Opcode, const SDLoc &dl, EVT MemVT,
1056 SDValue getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT, SDValue Chain,
1061 SDValue getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT, EVT VT,
1066 SDValue getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT,
1076 ArrayRef<SDValue> Ops, EVT MemVT,
1085 ArrayRef<SDValue> Ops, EVT MemVT,
1111 SDValue Ptr, MachinePointerInfo PtrInfo, EVT MemVT,
1116 SDValue Chain, SDValue Ptr, EVT MemVT,
1122 MachinePointerInfo PtrInfo, EVT MemVT, unsigned Alignment = 0,
1128 EVT MemVT, MachineMemOperand *MMO);
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DBasicTTIImpl.h898 EVT MemVT = getTLI()->getValueType(DL, Src); variable
900 LA = getTLI()->getTruncStoreAction(LT.second, MemVT);
902 LA = getTLI()->getLoadExtAction(ISD::EXTLOAD, LT.second, MemVT);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp1164 EVT MemVT = Store->getMemoryVT(); in lowerPrivateTruncStore() local
1197 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in lowerPrivateTruncStore()
1238 EVT MemVT = StoreNode->getMemoryVT(); in LowerSTORE() local
1255 MemVT, StoreNode->getAlignment(), in LowerSTORE()
1264 if (Align < MemVT.getStoreSize() && in LowerSTORE()
1266 MemVT, AS, Align, StoreNode->getMemOperand()->getFlags(), nullptr)) { in LowerSTORE()
1279 if (MemVT == MVT::i8) { in LowerSTORE()
1282 assert(MemVT == MVT::i16); in LowerSTORE()
1310 Op->getVTList(), Args, MemVT, in LowerSTORE()
1329 if (MemVT.bitsLT(MVT::i32)) in LowerSTORE()
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DSIISelLowering.h43 SDValue lowerKernargMemParameter(SelectionDAG &DAG, EVT VT, EVT MemVT,
103 ArrayRef<SDValue> Ops, EVT MemVT,
116 SelectionDAG &DAG, EVT VT, EVT MemVT, const SDLoc &SL, SDValue Val,
141 EVT MemVT,
243 bool canMergeStoresTo(unsigned AS, EVT MemVT,
DAMDGPUISelLowering.cpp755 bool AMDGPUTargetLowering:: storeOfVectorConstantIsCheap(EVT MemVT, in storeOfVectorConstantIsCheap() argument
946 EVT MemVT = ArgVT; in analyzeFormalArgumentsCompute() local
955 MemVT = RegisterVT; in analyzeFormalArgumentsCompute()
957 MemVT = ArgVT; in analyzeFormalArgumentsCompute()
965 MemVT = RegisterVT; in analyzeFormalArgumentsCompute()
970 MemVT = ArgVT.getScalarType(); in analyzeFormalArgumentsCompute()
973 MemVT = RegisterVT; in analyzeFormalArgumentsCompute()
978 MemVT = EVT::getIntegerVT(State.getContext(), MemoryBits); in analyzeFormalArgumentsCompute()
987 MemVT = EVT::getVectorVT(State.getContext(), ScalarVT, NumElements); in analyzeFormalArgumentsCompute()
994 if (MemVT.isVector() && MemVT.getVectorNumElements() == 1) in analyzeFormalArgumentsCompute()
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DSIISelLowering.cpp1234 bool SITargetLowering::canMergeStoresTo(unsigned AS, EVT MemVT, in canMergeStoresTo() argument
1237 return (MemVT.getSizeInBits() <= 4 * 32); in canMergeStoresTo()
1240 return (MemVT.getSizeInBits() <= MaxPrivateBits); in canMergeStoresTo()
1242 return (MemVT.getSizeInBits() <= 2 * 32); in canMergeStoresTo()
1438 SDValue SITargetLowering::convertArgType(SelectionDAG &DAG, EVT VT, EVT MemVT, in convertArgType() argument
1444 VT.getVectorNumElements() != MemVT.getVectorNumElements()) { in convertArgType()
1446 EVT::getVectorVT(*DAG.getContext(), MemVT.getVectorElementType(), in convertArgType()
1454 VT.bitsLT(MemVT)) { in convertArgType()
1456 Val = DAG.getNode(Opc, SL, MemVT, Val, DAG.getValueType(VT)); in convertArgType()
1459 if (MemVT.isFloatingPoint()) in convertArgType()
[all …]
DR600ISelLowering.h49 bool canMergeStoresTo(unsigned AS, EVT MemVT,
DAMDGPUISelLowering.h190 bool storeOfVectorConstantIsCheap(EVT MemVT,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAG.cpp6582 SDValue SelectionDAG::getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT, in getAtomic() argument
6586 ID.AddInteger(MemVT.getRawBits()); in getAtomic()
6596 VTList, MemVT, MMO); in getAtomic()
6605 EVT MemVT, SDVTList VTs, SDValue Chain, in getAtomicCmpSwap() argument
6613 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO); in getAtomicCmpSwap()
6616 SDValue SelectionDAG::getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT, in getAtomic() argument
6641 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO); in getAtomic()
6644 SDValue SelectionDAG::getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT, in getAtomic() argument
6651 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO); in getAtomic()
6668 EVT MemVT, MachinePointerInfo PtrInfo, unsigned Align, in getMemIntrinsicNode() argument
[all …]
DDAGCombiner.cpp626 EVT &MemVT, unsigned ShAmt = 0);
647 EVT MemVT, unsigned NumStores,
1113 EVT MemVT = LD->getMemoryVT(); in PromoteOperand() local
1119 MemVT, LD->getMemOperand()); in PromoteOperand()
1347 EVT MemVT = LD->getMemoryVT(); in PromoteLoad() local
1352 MemVT, LD->getMemOperand()); in PromoteLoad()
4806 ISD::LoadExtType ExtType, EVT &MemVT, in isLegalNarrowLdSt() argument
4816 if (!MemVT.isRound()) in isLegalNarrowLdSt()
4824 if (LDST->getMemoryVT().getSizeInBits() < MemVT.getSizeInBits()) in isLegalNarrowLdSt()
4829 !TLI.allowsMemoryAccess(*DAG.getContext(), DAG.getDataLayout(), MemVT, in isLegalNarrowLdSt()
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DSelectionDAGBuilder.cpp2359 EVT MemVT = TLI.getMemValueType(DAG.getDataLayout(), CB.CmpLHS->getType()); in visitSwitchCase() local
2378 if (CondLHS.getValueType() != MemVT) { in visitSwitchCase()
2379 CondLHS = DAG.getPtrExtOrTrunc(CondLHS, getCurSDLoc(), MemVT); in visitSwitchCase()
2380 CondRHS = DAG.getPtrExtOrTrunc(CondRHS, getCurSDLoc(), MemVT); in visitSwitchCase()
3245 EVT MemVT = in visitICmp() local
3251 if (Op1.getValueType() != MemVT) { in visitICmp()
3252 Op1 = DAG.getPtrExtOrTrunc(Op1, getCurSDLoc(), MemVT); in visitICmp()
3253 Op2 = DAG.getPtrExtOrTrunc(Op2, getCurSDLoc(), MemVT); in visitICmp()
4633 MVT MemVT = getValue(I.getCompareOperand()).getSimpleValueType(); in visitAtomicCmpXchg() local
4634 SDVTList VTs = DAG.getVTList(MemVT, MVT::i1, MVT::Other); in visitAtomicCmpXchg()
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DLegalizeVectorTypes.cpp4788 EVT MemVT((MVT::SimpleValueType) VT); in FindMemType() local
4789 unsigned MemVTWidth = MemVT.getSizeInBits(); in FindMemType()
4790 if (MemVT.getSizeInBits() <= WidenEltWidth) in FindMemType()
4792 auto Action = TLI.getTypeAction(*DAG.getContext(), MemVT); in FindMemType()
4800 return MemVT; in FindMemType()
4801 RetVT = MemVT; in FindMemType()
4811 EVT MemVT = (MVT::SimpleValueType) VT; in FindMemType() local
4813 if (Scalable != MemVT.isScalableVector()) in FindMemType()
4815 unsigned MemVTWidth = MemVT.getSizeInBits().getKnownMinSize(); in FindMemType()
4816 auto Action = TLI.getTypeAction(*DAG.getContext(), MemVT); in FindMemType()
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DLegalizeDAG.cpp508 EVT MemVT = ST->getMemoryVT(); in LegalizeStoreOps() local
510 if (!TLI.allowsMemoryAccessForAlignment(*DAG.getContext(), DL, MemVT, in LegalizeStoreOps()
620 EVT MemVT = ST->getMemoryVT(); in LegalizeStoreOps() local
623 if (!TLI.allowsMemoryAccessForAlignment(*DAG.getContext(), DL, MemVT, in LegalizeStoreOps()
680 EVT MemVT = LD->getMemoryVT(); in LegalizeLoadOps() local
684 if (!TLI.allowsMemoryAccessForAlignment(*DAG.getContext(), DL, MemVT, in LegalizeLoadOps()
867 EVT MemVT = LD->getMemoryVT(); in LegalizeLoadOps() local
869 if (!TLI.allowsMemoryAccess(*DAG.getContext(), DL, MemVT, in LegalizeLoadOps()
3559 EVT MemVT = EVT::getIntegerVT(*DAG.getContext(), EntrySize * 8); in ExpandNode() local
3562 MachinePointerInfo::getJumpTable(DAG.getMachineFunction()), MemVT); in ExpandNode()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp1341 EVT MemVT = StoreNode->getMemoryVT(); in tryFoldLoadStoreIntoMemOperand() local
1351 if (MemVT == MVT::i32) in tryFoldLoadStoreIntoMemOperand()
1353 else if (MemVT == MVT::i64) in tryFoldLoadStoreIntoMemOperand()
1362 if (MemVT == MVT::i32) in tryFoldLoadStoreIntoMemOperand()
1364 else if (MemVT == MVT::i64) in tryFoldLoadStoreIntoMemOperand()
1386 Operand = CurDAG->getTargetConstant(OperandV, DL, MemVT); in tryFoldLoadStoreIntoMemOperand()
DSystemZISelLowering.cpp3902 EVT MemVT = Node->getMemoryVT(); in lowerATOMIC_LOAD_SUB() local
3903 if (MemVT == MVT::i32 || MemVT == MVT::i64) { in lowerATOMIC_LOAD_SUB()
3905 assert(Op.getValueType() == MemVT && "Mismatched VTs"); in lowerATOMIC_LOAD_SUB()
3915 NegSrc2 = DAG.getConstant(Value, DL, MemVT); in lowerATOMIC_LOAD_SUB()
3918 NegSrc2 = DAG.getNode(ISD::SUB, DL, MemVT, DAG.getConstant(0, DL, MemVT), in lowerATOMIC_LOAD_SUB()
3922 return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, DL, MemVT, in lowerATOMIC_LOAD_SUB()
5768 EVT MemVT = SN->getMemoryVT(); in combineSTORE() local
5773 if (MemVT.isInteger() && SN->isTruncatingStore()) { in combineSTORE()
5775 combineTruncateExtract(SDLoc(N), MemVT, SN->getValue(), DCI)) { in combineSTORE()
5801 Ops, MemVT, SN->getMemOperand()); in combineSTORE()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMISelLowering.h580 bool canMergeStoresTo(unsigned AddressSpace, EVT MemVT, in canMergeStoresTo() argument
583 return (MemVT.getSizeInBits() <= 32); in canMergeStoresTo()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64ISelLowering.h520 bool canMergeStoresTo(unsigned AddressSpace, EVT MemVT, in canMergeStoresTo() argument
529 return (MemVT.getSizeInBits() <= 64); in canMergeStoresTo()
DAArch64ISelLowering.cpp3070 EVT VT, EVT MemVT, in LowerTruncateVectorStore() argument
3073 assert(MemVT == MVT::v4i8 && VT == MVT::v4i16); in LowerTruncateVectorStore()
3112 EVT MemVT = StoreNode->getMemoryVT(); in LowerSTORE() local
3117 if (Align < MemVT.getStoreSize() && in LowerSTORE()
3118 !allowsMisalignedMemoryAccesses(MemVT, AS, Align, in LowerSTORE()
3125 return LowerTruncateVectorStore(Dl, StoreNode, VT, MemVT, DAG); in LowerSTORE()
3127 } else if (MemVT == MVT::i128 && StoreNode->isVolatile()) { in LowerSTORE()
3469 MVT MemVT = VA.getValVT(); in LowerFormalArguments() local
3476 MemVT = VA.getLocVT(); in LowerFormalArguments()
3496 MemVT); in LowerFormalArguments()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsISelLowering.cpp2654 EVT VT = LD->getValueType(0), MemVT = LD->getMemoryVT(); in createLoadLR() local
2664 return DAG.getMemIntrinsicNode(Opc, DL, VTList, Ops, MemVT, in createLoadLR()
2671 EVT MemVT = LD->getMemoryVT(); in lowerLOAD() local
2677 if ((LD->getAlignment() >= MemVT.getSizeInBits() / 8) || in lowerLOAD()
2678 ((MemVT != MVT::i32) && (MemVT != MVT::i64))) in lowerLOAD()
2736 EVT MemVT = SD->getMemoryVT(), BasePtrVT = Ptr.getValueType(); in createStoreLR() local
2745 return DAG.getMemIntrinsicNode(Opc, DL, VTList, Ops, MemVT, in createStoreLR()
2797 EVT MemVT = SD->getMemoryVT(); in lowerSTORE() local
2801 (SD->getAlignment() < MemVT.getSizeInBits() / 8) && in lowerSTORE()
2802 ((MemVT == MVT::i32) || (MemVT == MVT::i64))) in lowerSTORE()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp2550 EVT MemVT = LD->getMemoryVT(); in usePartialVectorLoads() local
2551 if (!MemVT.isSimple()) in usePartialVectorLoads()
2553 switch(MemVT.getSimpleVT().SimpleTy) { in usePartialVectorLoads()
7846 bool PPCTargetLowering::canReuseLoadAddress(SDValue Op, EVT MemVT, in canReuseLoadAddress() argument
7865 if (LD->getMemoryVT() != MemVT) in canReuseLoadAddress()
9898 EVT MemVT = AtomicNode->getMemoryVT(); in LowerATOMIC_CMP_SWAP() local
9899 if (MemVT.getSizeInBits() >= 32) in LowerATOMIC_CMP_SWAP()
9904 auto HighBits = APInt::getHighBitsSet(32, 32 - MemVT.getSizeInBits()); in LowerATOMIC_CMP_SWAP()
9909 unsigned MaskVal = (1 << MemVT.getSizeInBits()) - 1; in LowerATOMIC_CMP_SWAP()
9922 (MemVT == MVT::i8) ? PPCISD::ATOMIC_CMP_SWAP_8 : PPCISD::ATOMIC_CMP_SWAP_16; in LowerATOMIC_CMP_SWAP()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVISelLowering.cpp324 EVT MemVT = LD->getMemoryVT(); in isZExtFree() local
325 if ((MemVT == MVT::i8 || MemVT == MVT::i16 || in isZExtFree()
326 (Subtarget.is64Bit() && MemVT == MVT::i32)) && in isZExtFree()

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