| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86TargetTransformInfo.cpp | 1756 { ISD::SETCC, MVT::v2i64, 2 }, in getCmpSelInstrCost()
1760 { ISD::SETCC, MVT::v32i16, 1 }, in getCmpSelInstrCost()
1761 { ISD::SETCC, MVT::v64i8, 1 }, in getCmpSelInstrCost()
1768 { ISD::SETCC, MVT::v8i64, 1 }, in getCmpSelInstrCost()
1769 { ISD::SETCC, MVT::v16i32, 1 }, in getCmpSelInstrCost()
1770 { ISD::SETCC, MVT::v8f64, 1 }, in getCmpSelInstrCost()
1771 { ISD::SETCC, MVT::v16f32, 1 }, in getCmpSelInstrCost()
1780 { ISD::SETCC, MVT::v4i64, 1 }, in getCmpSelInstrCost()
1781 { ISD::SETCC, MVT::v8i32, 1 }, in getCmpSelInstrCost()
1782 { ISD::SETCC, MVT::v16i16, 1 }, in getCmpSelInstrCost()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.h | 41 SETCC, enumerator
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| D | LanaiISelLowering.cpp | 88 setOperationAction(ISD::SETCC, MVT::i32, Custom); in LanaiTargetLowering()
192 case ISD::SETCC: in LowerOperation()
980 return DAG.getNode(LanaiISD::SETCC, DL, Op.getValueType(), TargetCC, Flag); in LowerSETCC()
1104 case LanaiISD::SETCC: in getTargetNodeName()
1495 case LanaiISD::SETCC: in computeKnownBitsForTargetNode()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | ConstrainedOps.def | 51 // Both of these match to FCmp / SETCC.
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.h | 54 SETCC, enumerator
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| D | MSP430ISelLowering.cpp | 93 setOperationAction(ISD::SETCC, MVT::i8, Custom); in MSP430TargetLowering()
94 setOperationAction(ISD::SETCC, MVT::i16, Custom); in MSP430TargetLowering()
348 case ISD::SETCC: return LowerSETCC(Op, DAG); in LowerOperation()
1385 case MSP430ISD::SETCC: return "MSP430ISD::SETCC"; in getTargetNodeName()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 504 SETCC, enumerator
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 63 case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break; in ScalarizeVectorResult()
442 if (Cond->getOpcode() == ISD::SETCC) { in ScalarizeVecRes_VSELECT()
535 SDValue Res = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, in ScalarizeVecRes_SETCC()
592 case ISD::SETCC: in ScalarizeVectorOperand()
728 SDValue Res = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, in ScalarizeVecOp_VSETCC()
849 case ISD::SETCC: in SplitVectorResult()
1549 if (Mask.getOpcode() == ISD::SETCC) { in SplitVecRes_MLOAD()
1617 if (Mask.getOpcode() == ISD::SETCC) { in SplitVecRes_MGATHER()
1925 case ISD::SETCC: Res = SplitVecOp_VSETCC(N); break; in SplitVectorOperand()
2331 if (OpNo == 1 && Mask.getOpcode() == ISD::SETCC) { in SplitVecOp_MSTORE()
[all …]
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| D | LegalizeDAG.cpp | 1036 case ISD::SETCC: in LegalizeOp()
1041 Node->getOpcode() == ISD::SETCC ? 2 : 1; in LegalizeOp()
3522 if (Tmp1.getOpcode() == ISD::SETCC) { in ExpandNode()
3581 if (Tmp2.getOpcode() == ISD::SETCC) { in ExpandNode()
3603 case ISD::SETCC: in ExpandNode()
3606 bool IsStrict = Node->getOpcode() != ISD::SETCC; in ExpandNode()
3621 Tmp1 = DAG.getNode(ISD::SETCC, dl, Node->getValueType(0), in ExpandNode()
3680 SDValue Cond = DAG.getNode(ISD::SETCC, dl, CCVT, Tmp1, Tmp2, CC, Node->getFlags()); in ExpandNode()
4224 Node->getOpcode() == ISD::SETCC || in PromoteNode()
4419 case ISD::SETCC: { in PromoteNode()
[all …]
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| D | DAGCombiner.cpp | 818 if (N.getOpcode() == ISD::SETCC) { in isSetCCEquivalent()
1557 case ISD::SETCC: return visitSETCC(N); in visit()
2017 if (Z.getOperand(0).getOpcode() != ISD::SETCC || in foldAddSubBoolOfMaskedVal()
4662 TLI.isOperationLegal(ISD::SETCC, OpVT)))) in foldLogicOfSetCCs()
7069 case ISD::SETCC: in visitXOR()
7471 if (N01CV && N01CV->isConstant() && N00.getOpcode() == ISD::SETCC && in visitSHL()
8369 if (Cond.getOpcode() != ISD::SETCC || !Cond.hasOneUse() || in foldSelectOfConstantsUsingSra()
8631 if (N0.getOpcode() == ISD::SETCC) { in visitSELECT()
8886 if (N0.getOpcode() == ISD::SETCC) { in visitVSELECT()
8941 TLI.isOperationLegalOrCustom(ISD::SETCC, WideVT)) { in visitVSELECT()
[all …]
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| D | LegalizeVectorOps.cpp | 403 case ISD::SETCC: in LegalizeOp()
881 case ISD::SETCC: in Expand()
1560 Ops[i] = DAG.getNode(ISD::SETCC, dl, in UnrollVSETCC()
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| D | LegalizeTypesGeneric.cpp | 523 else if (Cond.getOpcode() == ISD::SETCC) { in SplitRes_SELECT()
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| D | LegalizeFloatTypes.cpp | 795 case ISD::SETCC: Res = SoftenFloatOp_SETCC(N); break; in SoftenFloatOperand()
960 NewLHS = DAG.getNode(ISD::SETCC, SDLoc(N), N->getValueType(0), NewLHS, in SoftenFloatOp_SETCC()
1671 case ISD::SETCC: Res = ExpandFloatOp_SETCC(N); break; in ExpandFloatOperand()
1976 case ISD::SETCC: R = PromoteFloatOp_SETCC(N, OpNo); break; in PromoteFloatOperand()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 106 setOperationAction(ISD::SETCC, MVT::i8, Custom); in AVRTargetLowering()
107 setOperationAction(ISD::SETCC, MVT::i16, Custom); in AVRTargetLowering()
108 setOperationAction(ISD::SETCC, MVT::i32, Custom); in AVRTargetLowering()
109 setOperationAction(ISD::SETCC, MVT::i64, Custom); in AVRTargetLowering()
701 case ISD::SETCC: in LowerOperation()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 147 setOperationAction(ISD::SETCC, MVT::v4i32, Expand); in R600TargetLowering()
148 setOperationAction(ISD::SETCC, MVT::v2i32, Expand); in R600TargetLowering()
164 setOperationAction(ISD::SETCC, MVT::i32, Expand); in R600TargetLowering()
165 setOperationAction(ISD::SETCC, MVT::f32, Expand); in R600TargetLowering()
886 ISD::SETCC, in lowerFP_TO_UINT()
896 ISD::SETCC, in lowerFP_TO_SINT()
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| D | AMDGPUISelLowering.h | 368 SETCC, enumerator
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| D | AMDGPUInstrInfo.td | 205 def AMDGPUsetcc : SDNode<"AMDGPUISD::SETCC", AMDGPUSetCCOp>;
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| D | SIISelLowering.cpp | 220 setOperationAction(ISD::SETCC, MVT::i1, Promote); in SITargetLowering()
221 setOperationAction(ISD::SETCC, MVT::v2i1, Expand); in SITargetLowering()
222 setOperationAction(ISD::SETCC, MVT::v4i1, Expand); in SITargetLowering()
223 AddPromotedToType(ISD::SETCC, MVT::i1, MVT::i32); in SITargetLowering()
731 setTargetDAGCombine(ISD::SETCC); in SITargetLowering()
1403 if (VT == MVT::i1 && Op == ISD::SETCC) in isTypeDesirableForOp()
4232 SDValue SetCC = DAG.getNode(AMDGPUISD::SETCC, DL, CCVT, LHS, RHS, in lowerICMPIntrinsic()
4264 SDValue SetCC = DAG.getNode(AMDGPUISD::SETCC, SL, CCVT, Src0, in lowerFCMPIntrinsic()
4465 if (Intr->getOpcode() == ISD::SETCC) { in LowerBRCOND()
8181 case ISD::SETCC: in isBoolSGPR()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 105 setTargetDAGCombine(ISD::SETCC); in MipsSETargetLowering()
128 setOperationAction(ISD::SETCC, MVT::f16, Promote); in MipsSETargetLowering()
247 setOperationAction(ISD::SETCC, MVT::i32, Legal); in MipsSETargetLowering()
251 setOperationAction(ISD::SETCC, MVT::f32, Legal); in MipsSETargetLowering()
256 setOperationAction(ISD::SETCC, MVT::f64, Legal); in MipsSETargetLowering()
294 setOperationAction(ISD::SETCC, MVT::i64, Legal); in MipsSETargetLowering()
362 setOperationAction(ISD::SETCC, Ty, Legal); in addMSAIntType()
399 setOperationAction(ISD::SETCC, Ty, Legal); in addMSAFloatType()
1051 case ISD::SETCC: in PerformDAGCombine()
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| D | MipsISelLowering.cpp | 342 AddPromotedToType(ISD::SETCC, MVT::i1, MVT::i32); in MipsTargetLowering()
354 setOperationAction(ISD::SETCC, MVT::f32, Custom); in MipsTargetLowering()
355 setOperationAction(ISD::SETCC, MVT::f64, Custom); in MipsTargetLowering()
645 if (Op.getOpcode() != ISD::SETCC) in createFPCmp()
683 if ((SetCC.getOpcode() != ISD::SETCC) || in performSELECTCombine()
1229 case ISD::SETCC: return lowerSETCC(Op, DAG); in LowerOperation()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLoweringHVX.cpp | 156 setOperationAction(ISD::SETCC, T, Custom); in initializeHVXLowering()
178 setOperationAction(ISD::SETCC, BoolW, Custom); in initializeHVXLowering()
1551 case ISD::SETCC: in LowerHvxOperation()
1581 case ISD::SETCC: in LowerHvxOperation()
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| D | HexagonISelLowering.cpp | 1369 setOperationAction(ISD::SETCC, MVT::i8, Custom); in HexagonTargetLowering()
1370 setOperationAction(ISD::SETCC, MVT::i16, Custom); in HexagonTargetLowering()
1371 setOperationAction(ISD::SETCC, MVT::v4i8, Custom); in HexagonTargetLowering()
1372 setOperationAction(ISD::SETCC, MVT::v2i16, Custom); in HexagonTargetLowering()
1575 setOperationAction(ISD::SETCC, MVT::v2i16, Custom); in HexagonTargetLowering()
2933 case ISD::SETCC: return LowerSETCC(Op, DAG); in LowerOperation()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 209 setOperationAction(ISD::SETCC, MVT::i32, Custom); in AArch64TargetLowering()
210 setOperationAction(ISD::SETCC, MVT::i64, Custom); in AArch64TargetLowering()
211 setOperationAction(ISD::SETCC, MVT::f16, Custom); in AArch64TargetLowering()
212 setOperationAction(ISD::SETCC, MVT::f32, Custom); in AArch64TargetLowering()
213 setOperationAction(ISD::SETCC, MVT::f64, Custom); in AArch64TargetLowering()
274 setOperationAction(ISD::SETCC, MVT::f128, Custom); in AArch64TargetLowering()
436 setOperationAction(ISD::SETCC, MVT::f16, Promote); in AArch64TargetLowering()
471 setOperationAction(ISD::SETCC, MVT::v4f16, Expand); in AArch64TargetLowering()
498 setOperationAction(ISD::SETCC, MVT::v8f16, Expand); in AArch64TargetLowering()
725 setOperationAction(ISD::SETCC, MVT::v1f64, Expand); in AArch64TargetLowering()
[all …]
|
| /third_party/ltp/tools/sparse/sparse-src/Documentation/release-notes/ |
| D | v0.6.0.rst | 813 * simplify ZEXT(SETCC(x,y), N)
814 * simplify SEXT(SETCC(x,y), N)
815 * simplify TRUNC(SETCC(x,y), N)
816 * simplify AND(SETCC(x,y), M)
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1529 setOperationAction(ISD::SETCC, MVT::i32, Expand); in SparcTargetLowering()
1530 setOperationAction(ISD::SETCC, MVT::f32, Expand); in SparcTargetLowering()
1531 setOperationAction(ISD::SETCC, MVT::f64, Expand); in SparcTargetLowering()
1532 setOperationAction(ISD::SETCC, MVT::f128, Expand); in SparcTargetLowering()
1561 setOperationAction(ISD::SETCC, MVT::i64, Expand); in SparcTargetLowering()
|