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Searched refs:SETLT (Results 1 – 25 of 50) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h1070 SETLT, // 1 X 1 0 0 True if less than enumerator
1081 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFISelLowering.cpp490 case ISD::SETLT: in NegateCC()
693 SET_NEWCC(SETLT, JSLT); in EmitInstrWithCustomInserter()
704 CC == ISD::SETLT || in EmitInstrWithCustomInserter()
DBPFInstrInfo.td99 [{return (N->getZExtValue() == ISD::SETLT);}]>;
119 [{return (N->getZExtValue() == ISD::SETLT);}]>;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DAnalysis.cpp227 case ISD::SETOLT: case ISD::SETULT: return ISD::SETLT; in getFCmpCodeWithoutNaN()
246 case ICmpInst::ICMP_SLT: return ISD::SETLT; in getICmpCondCode()
DTargetLoweringBase.cpp550 CCs[RTLIB::OLT_F32] = ISD::SETLT; in InitCmpLibcallCCs()
551 CCs[RTLIB::OLT_F64] = ISD::SETLT; in InitCmpLibcallCCs()
552 CCs[RTLIB::OLT_F128] = ISD::SETLT; in InitCmpLibcallCCs()
553 CCs[RTLIB::OLT_PPCF128] = ISD::SETLT; in InitCmpLibcallCCs()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp3007 case ISD::SETLT: { in get32BitZExtCompare()
3186 case ISD::SETLT: { in get32BitSExtCompare()
3341 case ISD::SETLT: { in get64BitZExtCompare()
3501 case ISD::SETLT: { in get64BitSExtCompare()
3798 case ISD::SETLT: in SelectCC()
3825 case ISD::SETLT: in SelectCC()
3871 case ISD::SETLT: in getPredicateForSetCC()
3898 case ISD::SETLT: return 0; // Bit #0 = SETOLT in getCRIdxForSetCC()
3934 case ISD::SETLT: CC = ISD::SETGT; Swap = true; break; in getVCmpInst()
3980 case ISD::SETLT: CC = ISD::SETGT; Swap = true; break; in getVCmpInst()
[all …]
DPPCInstrQPX.td1027 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETLT),
1074 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETLT),
1114 def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETLT)),
1135 def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETLT)),
1156 def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETLT)),
DPPCInstrInfo.td3382 def : Pat<(i1 (setcc i1:$s1, i1:$s2, SETLT)),
3522 defm : ExtSetCCPat<SETLT,
3554 defm : ExtSetCCPat<SETLT,
3629 def : Pat<(i1 (setcc i32:$s1, imm32SExt16:$imm, SETLT)),
3657 def : Pat<(i1 (setcc i32:$s1, i32:$s2, SETLT)),
3669 def : Pat<(i1 (setcc i64:$s1, imm64SExt16:$imm, SETLT)),
3697 def : Pat<(i1 (setcc i64:$s1, i64:$s2, SETLT)),
3818 def : Pat<(i1 (setcc f32:$s1, f32:$s2, SETLT)),
3834 def : Pat<(i1 (setcc f64:$s1, f64:$s2, SETLT)),
3850 def : Pat<(i1 (setcc f128:$s1, f128:$s2, SETLT)),
[all …]
DPPCInstrSPE.td848 def : Pat<(f32 (selectcc i1:$lhs, i1:$rhs, f32:$tval, f32:$fval, SETLT)),
869 def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETLT)),
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp329 case ISD::SETLT: in softenSetCCOperands()
737 if (CC == ISD::SETLT && Op1.getValueType().isInteger() && in SimplifyMultipleUseDemandedBits()
1307 if (CC == ISD::SETLT && Op1.getValueType().isInteger() && in SimplifyDemandedBits()
3382 case ISD::SETLT: in SimplifySetCC()
3599 ISD::CondCode NewCC = (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT; in SimplifySetCC()
3611 if (Cond == ISD::SETLT || Cond == ISD::SETULT) { in SimplifySetCC()
3664 ISD::SETLT); in SimplifySetCC()
3965 case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> ~Y & X in SimplifySetCC()
5903 Next = DAG.getSelectCC(dl, LH, Zero, NextSub, Next, ISD::SETLT); in expandMUL_LOHI()
5907 Next = DAG.getSelectCC(dl, RH, Zero, NextSub, Next, ISD::SETLT); in expandMUL_LOHI()
[all …]
DLegalizeIntegerTypes.cpp1388 case ISD::SETLT: in PromoteSetCCOperands()
2213 return std::make_pair(ISD::SETLT, ISD::UMIN); in getExpandedMinMaxOps()
3050 SDValue ProdNeg = DAG.getSetCC(dl, BoolVT, Product, Zero, ISD::SETLT); in ExpandIntRes_MULFIX()
3191 SDValue HHLT = DAG.getSetCC(dl, BoolNVT, ResultHH, NVTNeg1, ISD::SETLT); in ExpandIntRes_MULFIX()
3200 SDValue HLNeg = DAG.getSetCC(dl, BoolNVT, ResultHL, NVTZero, ISD::SETLT); in ExpandIntRes_MULFIX()
3204 SDValue HHLT = DAG.getSetCC(dl, BoolNVT, ResultHH, NVTNeg1, ISD::SETLT); in ExpandIntRes_MULFIX()
3218 SatMin = DAG.getSetCC(dl, BoolNVT, ResultHH, HHHiMask, ISD::SETLT); in ExpandIntRes_MULFIX()
3834 if ((CCCode == ISD::SETLT && CST->isNullValue()) || // X < 0 in IntegerExpandSetCCOperands()
3845 case ISD::SETLT: in IntegerExpandSetCCOperands()
3915 case ISD::SETGT: CCCode = ISD::SETLT; FlipOperands = true; break; in IntegerExpandSetCCOperands()
DSelectionDAGDumper.cpp427 case ISD::SETLT: return "setlt"; in getOperationName()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInteger.td76 defm LT_S : ComparisonInt<SETLT, "lt_s", 0x48, 0x53>;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86IntrinsicsInfo.h1005 X86_INTRINSIC_DATA(sse_comilt_ss, COMI, X86ISD::COMI, ISD::SETLT),
1022 X86_INTRINSIC_DATA(sse_ucomilt_ss, COMI, X86ISD::UCOMI, ISD::SETLT),
1029 X86_INTRINSIC_DATA(sse2_comilt_sd, COMI, X86ISD::COMI, ISD::SETLT),
1076 X86_INTRINSIC_DATA(sse2_ucomilt_sd, COMI, X86ISD::UCOMI, ISD::SETLT),
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRISelLowering.cpp432 case ISD::SETLT: in intCCToAVRCC()
474 CC = ISD::SETLT; in getAVRCmp()
489 CC = ISD::SETLT; in getAVRCmp()
492 case ISD::SETLT: { in getAVRCmp()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIInsertSkips.cpp208 case ISD::SETLT: in kill()
DAMDGPUInstructions.td248 def COND_OLT : PatFrags<(ops), [(OtherVT SETOLT), (OtherVT SETLT)]>;
274 def COND_SLT : PatFrag<(ops), (OtherVT SETLT)>;
DAMDGPUISelLowering.cpp1289 case ISD::SETLT: { in combineFMinMaxLegacy()
1996 SDValue LHSign = DAG.getSelectCC(DL, LHS, Zero, NegOne, Zero, ISD::SETLT); in LowerSDIVREM()
1997 SDValue RHSign = DAG.getSelectCC(DL, RHS, Zero, NegOne, Zero, ISD::SETLT); in LowerSDIVREM()
2119 SDValue ExpLt0 = DAG.getSetCC(SL, SetCCVT, Exp, Zero, ISD::SETLT); in LowerFTRUNC()
2237 SDValue ExpLt0 = DAG.getSetCC(SL, SetCCVT, Exp, Zero, ISD::SETLT); in LowerFROUND64()
2682 SDValue V = DAG.getSelectCC(DL, E, One, D, N, ISD::SETLT); in LowerFP_TO_FP16()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp203 { RTLIB::OLT_F64, "__mspabi_cmpd", ISD::SETLT }, in MSP430TargetLowering()
209 { RTLIB::OLT_F32, "__mspabi_cmpf", ISD::SETLT }, in MSP430TargetLowering()
1111 case ISD::SETLT: in EmitCMP()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenDAGISel.inc1748 /* 3121*/ OPC_CheckChild2CondCode, ISD::SETLT,
1758 …Src: (brcond (setcc:{ *:[i32] } GPR32Opnd:{ *:[i32] }:$rs, 0:{ *:[i32] }, SETLT:{ *:[Other] }), (b…
1850 /* 3283*/ OPC_CheckChild2CondCode, ISD::SETLT,
1860 …Src: (brcond (setcc:{ *:[i32] } GPR32Opnd:{ *:[i32] }:$rs, 0:{ *:[i32] }, SETLT:{ *:[Other] }), (b…
1919 /* 3394*/ OPC_CheckChild2CondCode, ISD::SETLT,
1931 …// Src: (brcond (setcc:{ *:[i32] } i32:{ *:[i32] }:$lhs, 1:{ *:[i32] }, SETLT:{ *:[Other] }), (bb:…
1938 …// Src: (brcond (setcc:{ *:[i32] } i32:{ *:[i32] }:$lhs, 1:{ *:[i32] }, SETLT:{ *:[Other] }), (bb:…
2242 /* 4004*/ OPC_CheckChild2CondCode, ISD::SETLT,
2253 …U16Regs:{ *:[i32] }:$rx, (imm:{ *:[i32] })<<P:Predicate_immSExt16>>:$imm, SETLT:{ *:[Other] }), (b…
2573 /* 4610*/ OPC_CheckChild2CondCode, ISD::SETLT,
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
DARCISelLowering.cpp61 case ISD::SETLT: in ISDCCtoARCCC()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/
DPPCGenDAGISel.inc3897 /* 8379*/ OPC_CheckChild2CondCode, ISD::SETLT,
3905 …(anyext:{ *:[i32] } (setcc:{ *:[i1] } i32:{ *:[i32] }:$s1, 0:{ *:[i32] }, SETLT:{ *:[Other] })) - …
3934 /* 8469*/ OPC_CheckChild2CondCode, ISD::SETLT,
3948 …(anyext:{ *:[i64] } (setcc:{ *:[i1] } i32:{ *:[i32] }:$s1, 0:{ *:[i32] }, SETLT:{ *:[Other] })) - …
4128 /* 9006*/ OPC_CheckChild2CondCode, ISD::SETLT,
4141 …anyext:{ *:[i32] } (setcc:{ *:[i1] } i32:{ *:[i32] }:$s1, -1:{ *:[i32] }, SETLT:{ *:[Other] })) - …
4196 /* 9192*/ OPC_CheckChild2CondCode, ISD::SETLT,
4215 …anyext:{ *:[i64] } (setcc:{ *:[i1] } i32:{ *:[i32] }:$s1, -1:{ *:[i32] }, SETLT:{ *:[Other] })) - …
4770 /* 10758*/ OPC_CheckChild2CondCode, ISD::SETLT,
4778 …(anyext:{ *:[i64] } (setcc:{ *:[i1] } i64:{ *:[i64] }:$s1, 0:{ *:[i64] }, SETLT:{ *:[Other] })) - …
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVISelLowering.cpp372 case ISD::SETLT: in getBranchOpcodeForIntCondCode()
763 SDValue CC = DAG.getSetCC(DL, VT, ShamtMinusXLen, Zero, ISD::SETLT); in lowerShiftLeftParts()
815 SDValue CC = DAG.getSetCC(DL, VT, ShamtMinusXLen, Zero, ISD::SETLT); in lowerShiftRightParts()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsMSAInstrInfo.td122 def vfsetlt_v4f32 : vfsetcc_type<v4i32, v4f32, SETLT>;
123 def vfsetlt_v2f64 : vfsetcc_type<v2i64, v2f64, SETLT>;
170 def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>;
171 def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>;
172 def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>;
173 def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>;
DMipsDSPInstrInfo.td1422 def : DSPSetCCPat<PseudoCMP_LT_PH, PseudoPICK_PH, v2i16, SETLT>;
1435 def : DSPSelectCCPat<PseudoCMP_LT_PH, PseudoPICK_PH, v2i16, SETLT>;

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