/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 1051 SETOGT, // 0 0 1 0 True if ordered and greater than enumerator
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | Analysis.cpp | 205 case FCmpInst::FCMP_OGT: return ISD::SETOGT; in getFCmpCondCode() 229 case ISD::SETOGT: case ISD::SETUGT: return ISD::SETGT; in getFCmpCodeWithoutNaN()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyInstrFloat.td | 85 defm GT : ComparisonFP<SETOGT, "gt ", 0x5e, 0x64>;
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D | WebAssemblyInstrSIMD.td | 492 defm GT : SIMDConditionFP<"gt", SETOGT, 67>;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIInsertSkips.cpp | 199 case ISD::SETOGT: in kill()
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D | AMDGPUInstructions.td | 246 def COND_OGT : PatFrags<(ops), [(OtherVT SETOGT), (OtherVT SETGT)]>;
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D | AMDGPUISelLowering.cpp | 1314 case ISD::SETOGT: { in combineFMinMaxLegacy() 2055 SDValue Lt0 = DAG.getSetCC(SL, SetCCVT, Src, Zero, ISD::SETOGT); in LowerFCEIL() 2150 SDValue Cond = DAG.getSetCC(SL, SetCCVT, Fabs, C2, ISD::SETOGT); in LowerFRINT()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCISelDAGToDAG.cpp | 3808 case ISD::SETOGT: in SelectCC() 3835 case ISD::SETOGT: in SelectCC() 3876 case ISD::SETOGT: in getPredicateForSetCC() 3899 case ISD::SETOGT: in getCRIdxForSetCC() 3936 case ISD::SETOLT: CC = ISD::SETOGT; Swap = true; break; in getVCmpInst() 3945 case ISD::SETULE: CC = ISD::SETOGT; Negate = true; break; in getVCmpInst() 3959 case ISD::SETOGT: in getVCmpInst()
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D | PPCInstrQPX.td | 470 (setcc v4f64:$FRA, v4f64:$FRB, SETOGT))]>; 475 (setcc v4f32:$FRA, v4f32:$FRB, SETOGT))]>;
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D | PPCInstrInfo.td | 3820 def : Pat<(i1 (setcc f32:$s1, f32:$s2, SETOGT)), 3836 def : Pat<(i1 (setcc f64:$s1, f64:$s2, SETOGT)), 3852 def : Pat<(i1 (setcc f128:$s1, f128:$s2, SETOGT)), 3873 def : Pat<(i1 (setcc f32:$s1, f32:$s2, SETOGT)), 3900 def : Pat<(i1 (setcc f64:$s1, f64:$s2, SETOGT)),
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 409 case ISD::SETOGT: return "setogt"; in getOperationName()
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D | SelectionDAG.cpp | 439 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE in getSetCCAndOperation() 2019 case ISD::SETOGT: in FoldSetCC() 2099 case ISD::SETOGT: return getBoolConstant(R==APFloat::cmpGreaterThan, dl, in FoldSetCC()
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D | TargetLowering.cpp | 342 case ISD::SETOGT: in softenSetCCOperands() 3803 return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGT); in SimplifySetCC()
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D | LegalizeDAG.cpp | 1685 case ISD::SETOGT: in LegalizeSetCCCondCode()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
D | MipsSEISelLowering.cpp | 264 setCondCodeAction(ISD::SETOGT, MVT::f32, Expand); in MipsSETargetLowering() 269 setCondCodeAction(ISD::SETOGT, MVT::f64, Expand); in MipsSETargetLowering() 401 setCondCodeAction(ISD::SETOGT, Ty, Expand); in addMSAFloatType()
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D | MipsMSAInstrInfo.td | 130 def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 131 def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>;
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D | MipsISelLowering.cpp | 612 case ISD::SETOGT: return Mips::FCOND_OGT; in condCodeToFCC()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 685 def SETOGT : CondCode<"FCMP_OGT">; 1277 (setcc node:$lhs, node:$rhs, SETOGT)>;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
D | LanaiISelLowering.cpp | 855 case ISD::SETOGT: in IntCondCCodeToICC()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 2681 case ISD::SETOGT: in getVectorComparison() 2801 SDValue LT = getVectorCmp(DAG, getVectorComparison(ISD::SETOGT, Mode), in lowerVectorSETCC() 2818 SDValue LT = getVectorCmp(DAG, getVectorComparison(ISD::SETOGT, Mode), in lowerVectorSETCC() 2820 SDValue GT = getVectorCmp(DAG, getVectorComparison(ISD::SETOGT, Mode), in lowerVectorSETCC()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.cpp | 2123 ISD::SETOGT); in LowerFROUND32() 2166 ISD::SETOGT); in LowerFROUND64()
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D | NVPTXISelDAGToDAG.cpp | 545 case ISD::SETOGT: in getPTXCmpMode()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
D | RISCVISelLowering.cpp | 159 ISD::SETOGT, ISD::SETOGE, ISD::SETONE, ISD::SETUEQ, ISD::SETUGT, in RISCVTargetLowering()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 1392 case ISD::SETOGT: return SPCC::FCC_G; in FPCondCCodeToFCC()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 1857 case ISD::SETOGT: CondCode = ARMCC::GT; break; in FPCCToARMCC() 4656 else if (CC == ISD::SETUGT || CC == ISD::SETOGT || CC == ISD::SETOLT || in checkVSELConstraints() 6280 case ISD::SETOGT: in LowerVSETCC()
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