| /third_party/skia/third_party/externals/spirv-cross/shaders-no-opt/comp/ |
| D | specialization-constant-evaluation.comp | 19 //const int SREM = STWO % SNEG_THREE; // 1
20 const int SREM = 1;
35 const bool SLT = SMOD < SREM; // true
36 const bool SLE = SMOD <= SREM; // true
37 const bool SGT = SMOD > SREM; // false
38 const bool SGE = SMOD >= SREM; // false
63 DUMMY_SSBO(SRem, 5, SREM);
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMTargetTransformInfo.cpp | 689 { ISD::SREM, MVT::v1i64, 1 * FunctionCallDivCost}, in getArithmeticInstrCost()
693 { ISD::SREM, MVT::v2i32, 2 * FunctionCallDivCost}, in getArithmeticInstrCost()
697 { ISD::SREM, MVT::v4i16, 4 * FunctionCallDivCost}, in getArithmeticInstrCost()
701 { ISD::SREM, MVT::v8i8, 8 * FunctionCallDivCost}, in getArithmeticInstrCost()
706 { ISD::SREM, MVT::v2i64, 2 * FunctionCallDivCost}, in getArithmeticInstrCost()
710 { ISD::SREM, MVT::v4i32, 4 * FunctionCallDivCost}, in getArithmeticInstrCost()
714 { ISD::SREM, MVT::v8i16, 8 * FunctionCallDivCost}, in getArithmeticInstrCost()
718 { ISD::SREM, MVT::v16i8, 16 * FunctionCallDivCost}, in getArithmeticInstrCost()
979 case ISD::SREM: in isHardwareLoopProfitable()
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| D | ARMISelLowering.cpp | 210 setOperationAction(ISD::SREM, VT, Expand); in addTypeForNEON()
286 setOperationAction(ISD::SREM, VT, Expand); in addMVEVectorTypes()
1132 setOperationAction(ISD::SREM, MVT::i32, Expand); in ARMTargetLowering()
1139 setOperationAction(ISD::SREM, MVT::i64, Custom); in ARMTargetLowering()
9322 case ISD::SREM: return LowerREM(Op.getNode(), DAG); in LowerOperation()
9436 case ISD::SREM: in ReplaceNodeResults()
16191 N->getOpcode() == ISD::SREM || N->getOpcode() == ISD::UREM) && in getDivRemLibcall()
16194 N->getOpcode() == ISD::SREM; in getDivRemLibcall()
16209 N->getOpcode() == ISD::SREM || N->getOpcode() == ISD::UREM) && in getDivRemArgList()
16212 N->getOpcode() == ISD::SREM; in getDivRemArgList()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86TargetTransformInfo.cpp | 248 if ((ISD == ISD::SDIV || ISD == ISD::SREM || ISD == ISD::UDIV || in getArithmeticInstrCost()
253 if (ISD == ISD::SDIV || ISD == ISD::SREM) { in getArithmeticInstrCost()
269 if (ISD == ISD::SREM) { in getArithmeticInstrCost()
351 { ISD::SREM, MVT::v64i8, 16 }, // 2*ext+2*pmulhw+mul+sub sequence in getArithmeticInstrCost()
355 { ISD::SREM, MVT::v32i16, 8 }, // vpmulhw+mul+sub sequence in getArithmeticInstrCost()
370 { ISD::SREM, MVT::v16i32, 17 }, // vpmuldq+mul+sub sequence in getArithmeticInstrCost()
385 { ISD::SREM, MVT::v32i8, 16 }, // 2*ext+2*pmulhw+mul+sub sequence in getArithmeticInstrCost()
389 { ISD::SREM, MVT::v16i16, 8 }, // vpmulhw+mul+sub sequence in getArithmeticInstrCost()
393 { ISD::SREM, MVT::v8i32, 19 }, // vpmuldq+mul+sub sequence in getArithmeticInstrCost()
407 { ISD::SREM, MVT::v32i8, 32+2 }, // 4*ext+4*pmulhw+mul+sub sequence + split. in getArithmeticInstrCost()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 202 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, enumerator
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| D | TargetLowering.h | 2283 case ISD::SREM: in isBinOp()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 1932 case ISD::SREM: in selectDivRem()
1953 unsigned MFOpc = (ISDOpcode == ISD::SREM || ISDOpcode == ISD::UREM) in selectDivRem()
2054 if (!selectBinaryOp(I, ISD::SREM)) in fastSelectInstruction()
2055 return selectDivRem(I, ISD::SREM); in fastSelectInstruction()
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| D | MipsSEISelLowering.cpp | 242 setOperationAction(ISD::SREM, MVT::i32, Legal); in MipsSETargetLowering()
289 setOperationAction(ISD::SREM, MVT::i64, Legal); in MipsSETargetLowering()
340 setOperationAction(ISD::SREM, Ty, Legal); in addMSAIntType()
2058 return DAG.getNode(ISD::SREM, DL, Op->getValueType(0), Op->getOperand(1), in lowerINTRINSIC_WO_CHAIN()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.h | 701 void visitSRem(const User &I) { visitBinary(I, ISD::SREM); } in visitSRem()
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| D | SelectionDAGDumper.cpp | 232 case ISD::SREM: return "srem"; in getOperationName()
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| D | LegalizeDAG.cpp | 3276 case ISD::SREM: { in ExpandNode()
3278 bool isSigned = Node->getOpcode() == ISD::SREM; in ExpandNode()
4148 case ISD::SREM: in ConvertNodeToLibcall()
4324 case ISD::SREM: in PromoteNode()
4342 case ISD::SREM: in PromoteNode()
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| D | SelectionDAG.cpp | 3183 case ISD::SREM: in computeKnownBits()
4822 case ISD::SREM: in FoldValue()
4865 case ISD::SREM: in isUndef()
5198 case ISD::SREM: in getNode()
5473 case ISD::SREM: in getNode()
5495 case ISD::SREM: in getNode()
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| D | LegalizeVectorOps.cpp | 373 case ISD::SREM: in LegalizeOp()
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| D | LegalizeVectorTypes.cpp | 136 case ISD::SREM: in ScalarizeVectorResult()
929 case ISD::SREM: in SplitVectorResult()
2742 case ISD::SREM: in WidenVectorResult()
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| D | FastISel.cpp | 1819 return selectBinaryOp(I, ISD::SREM); in selectOperator()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 791 case ISD::SREM: in canOpTrap()
1605 case SRem: return ISD::SREM; in InstructionOpcodeToISD()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 88 setOperationAction(ISD::SREM, VT, Expand); in BPFTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 138 setOperationAction(ISD::SREM, MVT::i8, Promote); in MSP430TargetLowering()
144 setOperationAction(ISD::SREM, MVT::i16, LibCall); in MSP430TargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 150 setOperationAction(ISD::SREM, MVT::i8, Expand); in AVRTargetLowering()
151 setOperationAction(ISD::SREM, MVT::i16, Expand); in AVRTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 523 setTargetDAGCombine(ISD::SREM); in NVPTXTargetLowering()
4543 assert(N->getOpcode() == ISD::SREM || N->getOpcode() == ISD::UREM); in PerformREMCombine()
4552 bool IsSigned = N->getOpcode() == ISD::SREM; in PerformREMCombine()
4771 case ISD::SREM: in PerformDAGCombine()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64FastISel.cpp | 4653 case ISD::SREM: in selectRem()
5171 if (!selectBinaryOp(I, ISD::SREM)) in fastSelectInstruction()
5172 return selectRem(I, ISD::SREM); in fastSelectInstruction()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 110 setOperationAction(ISD::SREM, MVT::i32, Expand); in LanaiTargetLowering()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 177 ISD::SREM, ISD::UREM, ISD::ROTL, ISD::ROTR}) { in WebAssemblyTargetLowering()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1428 {ISD::SDIV, ISD::UDIV, ISD::SREM, ISD::UREM, in HexagonTargetLowering()
1475 ISD::SREM, ISD::UREM, ISD::SDIVREM, ISD::UDIVREM, ISD::SADDO, in HexagonTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1496 setOperationAction(ISD::SREM, MVT::i32, Expand); in SparcTargetLowering()
1503 setOperationAction(ISD::SREM, MVT::i64, Expand); in SparcTargetLowering()
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