| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 224 ADDC, SUBC, enumerator
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| /third_party/pcre2/pcre2/src/sljit/ |
| D | sljitNativeSPARC_32.c | 104 …return push_inst(compiler, SUBC | (flags & SET_FLAGS) | D(dst) | S1(src1) | ARG2(flags, src2), DRF… in emit_single_op()
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| D | sljitNativeSPARC_common.c | 181 #define SUBC (OPC1(0x2) | OPC3(0x0c)) macro
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.h | 39 SUBC, // Sub with carry: (X, Y, Cin) -> (X+~Y+Cin, Cout). enumerator
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| D | HexagonISelLowering.cpp | 1688 case HexagonISD::SUBC: return "HexagonISD::SUBC"; in getTargetNodeName()
2847 SDValue SubC = DAG.getNode(HexagonISD::SUBC, dl, Op.getNode()->getVTList(), in LowerAddSubCarry()
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| D | HexagonISelDAGToDAG.cpp | 891 case HexagonISD::SUBC: return SelectAddSubCarry(N); in Select()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 106 SUBC, // Sub with carry enumerator
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| D | ARMISelLowering.cpp | 1585 case ARMISD::SUBC: return "ARMISD::SUBC"; in getTargetNodeName()
4495 SDValue Carry = DAG.getNode(ARMISD::SUBC, DL, in ConvertBooleanCarryToCarryFlag()
4535 Value = DAG.getNode(ARMISD::SUBC, dl, VTs, LHS, RHS); in LowerUnsignedALUO()
11400 AddcSubcNode->getOpcode() != ARMISD::SUBC)) in AddCombineTo64bitMLAL()
11498 if (AddcSubcNode->getOpcode() == ARMISD::SUBC) { in AddCombineTo64bitMLAL()
11507 } else if (AddcSubcNode->getOpcode() == ARMISD::SUBC) in AddCombineTo64bitMLAL()
11612 if (N->getOpcode() == ARMISD::SUBC) { in PerformAddcSubcCombine()
11630 unsigned Opcode = (N->getOpcode() == ARMISD::ADDC) ? ARMISD::SUBC in PerformAddcSubcCombine()
14631 case ARMISD::SUBC: return PerformAddcSubcCombine(N, DCI, Subtarget); in PerformDAGCombine()
15661 case ARMISD::SUBC: in computeKnownBitsForTargetNode()
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| D | ARMISelDAGToDAG.cpp | 3433 N->getOperand(2).getOpcode() != ARMISD::SUBC || in Select()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 298 case ISD::SUBC: return "subc"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 1887 case ISD::SUBC: ExpandIntRes_ADDSUBC(N, Lo, Hi); break; in ExpandIntegerResult()
2288 ISD::ADDC : ISD::SUBC, in ExpandIntRes_ADDSUB()
2298 Lo = DAG.getNode(ISD::SUBC, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
2395 Lo = DAG.getNode(ISD::SUBC, dl, VTList, LoOps); in ExpandIntRes_ADDSUBC()
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| D | TargetLowering.cpp | 3892 if (auto *SUBC = dyn_cast<ConstantSDNode>(N0.getOperand(0))) { in SimplifySetCC() local
3896 DAG.getConstant(SUBC->getAPIntValue() - in SimplifySetCC()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1550 setOperationAction(ISD::SUBC, MVT::i32, Custom); in SparcTargetLowering()
1556 setOperationAction(ISD::SUBC, MVT::i64, Custom); in SparcTargetLowering()
2906 case ISD::SUBC: hiOpc = ISD::SUBE; break; in LowerADDC_ADDE_SUBC_SUBE()
3054 case ISD::SUBC: in LowerOperation()
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| D | SparcInstrInfo.td | 726 defm SUBC : F3_12np <"subx", 0b001100>;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 759 case ISD::SUBC: in Select()
1005 ConsumeCarry || Opcode == ISD::ADDC || Opcode == ISD::SUBC; in SelectADD_SUB_I64()
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| D | R600ISelLowering.cpp | 261 setOperationAction(ISD::SUBC, VT, Expand); in R600TargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 680 setOperationAction(ISD::SUBC, VT, Expand); in initActions()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 115 ISD::SRL_PARTS, ISD::ADDC, ISD::ADDE, ISD::SUBC, ISD::SUBE}) { in WebAssemblyTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 69 setOperationAction(ISD::SUBC, VT, Legal); in AVRTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.td | 549 defm SUBC : Arith<0b0111, "subc", sube, 0, [SR]>;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 381 def subc : SDNode<"ISD::SUBC" , SDTIntBinOp,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 337 setOperationAction(ISD::SUBC, MVT::i32, Custom); in AArch64TargetLowering()
341 setOperationAction(ISD::SUBC, MVT::i64, Custom); in AArch64TargetLowering()
2440 case ISD::SUBC: in LowerADDC_ADDE_SUBC_SUBE()
3186 case ISD::SUBC: in LowerOperation()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenFastISel.inc | 2468 // FastEmit functions for ISD::SUBC.
3427 case ISD::SUBC: return fastEmit_ISD_SUBC_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
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| /third_party/skia/third_party/externals/opengl-registry/extensions/NV/ |
| D | NV_vertex_program2.txt | 257 SUBC R15.x, R15.x, c[1].x; # counter = counter - 1;
1006 | "SUBC"
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| /third_party/openGLES/extensions/NV/ |
| D | NV_vertex_program2.txt | 257 SUBC R15.x, R15.x, c[1].x; # counter = counter - 1;
1006 | "SUBC"
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