| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 1259 SDValue SetCC = DAG.getSetCC(dl, MVT::i32, ShAmt, Zero, ISD::SETEQ); in LowerSHL_PARTS() local
1260 LoBitsForHi = DAG.getSelect(dl, MVT::i32, SetCC, Zero, LoBitsForHi); in LowerSHL_PARTS()
1270 SetCC = DAG.getSetCC(dl, MVT::i32, ExtraShAmt, Zero, ISD::SETGE); in LowerSHL_PARTS()
1272 DAG.getSelect(dl, MVT::i32, SetCC, HiForBigShift, HiForNormalShift); in LowerSHL_PARTS()
1278 dl, MVT::i32, SetCC, DAG.getConstant(0, dl, MVT::i32), LoForNormalShift); in LowerSHL_PARTS()
1307 SDValue SetCC = DAG.getSetCC(dl, MVT::i32, NegatedPlus32, Zero, ISD::SETLE); in LowerSRL_PARTS() local
1310 Hi = DAG.getSelect(dl, MVT::i32, SetCC, Zero, Hi); in LowerSRL_PARTS()
1313 Lo = DAG.getSelect(dl, MVT::i32, SetCC, Hi, Lo); in LowerSRL_PARTS()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrCMovSetCC.td | 1 //===-- X86InstrCMovSetCC.td - Conditional Move and SetCC --*- tablegen -*-===//
75 // SetCC instructions.
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| D | X86ISelLowering.cpp | 22018 SDValue SetCC = getSETCC(Cond, Overflow, DL, DAG); in LowerXALUO() local
22020 return DAG.getNode(ISD::MERGE_VALUES, DL, Op->getVTList(), Value, SetCC); in LowerXALUO()
24006 SDValue SetCC; in LowerINTRINSIC_WO_CHAIN() local
24009 SetCC = getSETCC(X86::COND_E, Comi, dl, DAG); in LowerINTRINSIC_WO_CHAIN()
24011 SetCC = DAG.getNode(ISD::AND, dl, MVT::i8, SetCC, SetNP); in LowerINTRINSIC_WO_CHAIN()
24015 SetCC = getSETCC(X86::COND_NE, Comi, dl, DAG); in LowerINTRINSIC_WO_CHAIN()
24017 SetCC = DAG.getNode(ISD::OR, dl, MVT::i8, SetCC, SetP); in LowerINTRINSIC_WO_CHAIN()
24021 SetCC = getSETCC(X86::COND_A, Comi, dl, DAG); in LowerINTRINSIC_WO_CHAIN()
24024 SetCC = getSETCC(X86::COND_A, InvComi, dl, DAG); in LowerINTRINSIC_WO_CHAIN()
24028 SetCC = getSETCC(X86::COND_AE, Comi, dl, DAG); in LowerINTRINSIC_WO_CHAIN()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 681 SDValue SetCC = N->getOperand(0); in performSELECTCombine() local
683 if ((SetCC.getOpcode() != ISD::SETCC) || in performSELECTCombine()
684 !SetCC.getOperand(0).getValueType().isInteger()) in performSELECTCombine()
708 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get(); in performSELECTCombine()
711 SetCC = DAG.getSetCC(DL, SetCC.getValueType(), SetCC.getOperand(0), in performSELECTCombine()
712 SetCC.getOperand(1), in performSELECTCombine()
713 ISD::getSetCCInverse(CC, SetCC.getValueType())); in performSELECTCombine()
715 return DAG.getNode(ISD::SELECT, DL, FalseTy, SetCC, False, True); in performSELECTCombine()
738 return DAG.getNode(ISD::ADD, DL, SetCC.getValueType(), SetCC, False); in performSELECTCombine()
745 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get(); in performSELECTCombine()
[all …]
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| D | MipsSEISelLowering.cpp | 985 SDValue SetCC = N->getOperand(0); in performVSELECTCombine() local
987 if (SetCC.getOpcode() != MipsISD::SETCC_DSP) in performVSELECTCombine()
991 SetCC.getOperand(0), SetCC.getOperand(1), in performVSELECTCombine()
992 N->getOperand(1), N->getOperand(2), SetCC.getOperand(2)); in performVSELECTCombine()
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| D | MipsInstrInfo.td | 1515 // SetCC
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 2022 SDValue SetCC = Z.getOperand(0); in foldAddSubBoolOfMaskedVal() local
2023 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC->getOperand(2))->get(); in foldAddSubBoolOfMaskedVal()
2024 if (CC != ISD::SETEQ || !isNullConstant(SetCC.getOperand(1)) || in foldAddSubBoolOfMaskedVal()
2025 SetCC.getOperand(0).getOpcode() != ISD::AND || in foldAddSubBoolOfMaskedVal()
2026 !isOneConstant(SetCC.getOperand(0).getOperand(1))) in foldAddSubBoolOfMaskedVal()
2035 SDValue LowBit = DAG.getZExtOrTrunc(SetCC.getOperand(0), DL, VT); in foldAddSubBoolOfMaskedVal()
9227 for (SDNode *SetCC : SetCCs) { in ExtendSetCCUses()
9231 SDValue SOp = SetCC->getOperand(j); in ExtendSetCCUses()
9238 Ops.push_back(SetCC->getOperand(2)); in ExtendSetCCUses()
9239 CombineTo(SetCC, DAG.getNode(ISD::SETCC, DL, SetCC->getValueType(0), Ops)); in ExtendSetCCUses()
[all …]
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| D | LegalizeIntegerTypes.cpp | 927 SDValue SetCC; in PromoteIntRes_SETCC() local
932 SetCC = DAG.getNode(N->getOpcode(), dl, VTs, Opers); in PromoteIntRes_SETCC()
935 ReplaceValueWith(SDValue(N, 1), SetCC.getValue(1)); in PromoteIntRes_SETCC()
937 SetCC = DAG.getNode(N->getOpcode(), dl, SVT, N->getOperand(0), in PromoteIntRes_SETCC()
941 return DAG.getSExtOrTrunc(SetCC, dl, NVT); in PromoteIntRes_SETCC()
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| D | TargetLowering.cpp | 7417 SDValue SetCC = DAG.getSetCC(dl, SetCCType, Result, LHS, CC); in expandUADDSUBO() local
7418 Overflow = DAG.getBoolExtOrTrunc(SetCC, dl, ResultType, ResultType); in expandUADDSUBO()
7439 SDValue SetCC = DAG.getSetCC(dl, OType, Result, Sat, ISD::SETNE); in expandSADDSUBO() local
7440 Overflow = DAG.getBoolExtOrTrunc(SetCC, dl, ResultType, ResultType); in expandSADDSUBO()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 4232 SDValue SetCC = DAG.getNode(AMDGPUISD::SETCC, DL, CCVT, LHS, RHS, in lowerICMPIntrinsic() local
4235 return SetCC; in lowerICMPIntrinsic()
4236 return DAG.getZExtOrTrunc(SetCC, DL, VT); in lowerICMPIntrinsic()
4264 SDValue SetCC = DAG.getNode(AMDGPUISD::SETCC, SL, CCVT, Src0, in lowerFCMPIntrinsic() local
4267 return SetCC; in lowerFCMPIntrinsic()
4268 return DAG.getZExtOrTrunc(SetCC, SL, VT); in lowerFCMPIntrinsic()
4463 SDNode *SetCC = nullptr; in LowerBRCOND() local
4467 SetCC = Intr; in LowerBRCOND()
4468 Intr = SetCC->getOperand(0).getNode(); in LowerBRCOND()
4492 assert(!SetCC || in LowerBRCOND()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 3631 SDValue SetCC = emitSETCC(DAG, DL, Result.getValue(1), CCValid, CCMask); in lowerXALUO() local
3633 SetCC = DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, SetCC); in lowerXALUO()
3635 return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Result, SetCC); in lowerXALUO()
3697 SDValue SetCC = emitSETCC(DAG, DL, Result.getValue(1), CCValid, CCMask); in lowerADDSUBCARRY() local
3699 SetCC = DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, SetCC); in lowerADDSUBCARRY()
3701 return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Result, SetCC); in lowerADDSUBCARRY()
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
| D | GPRArith.cpp | 47 TEST_F(AssemblerX8632Test, SetCC) { in TEST_F() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
| D | GPRArith.cpp | 32 TEST_F(AssemblerX8664Test, SetCC) { in TEST_F() argument
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 12203 SDValue SetCC = in performVSelectCombine() local
12207 return DAG.getNode(ISD::VSELECT, SDLoc(N), ResVT, SetCC, in performVSelectCombine()
12264 SDValue SetCC = DAG.getNode(ISD::SETCC, DL, CCVT, LHS, RHS, N0.getOperand(2)); in performSelectCombine() local
12268 SDValue Mask = DAG.getVectorShuffle(CCVT, DL, SetCC, SetCC, DUPMask); in performSelectCombine()
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