| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/DWARF/ |
| D | DWARFExpression.h | 45 SignBit = 0x80, enumerator
46 SignedSize1 = SignBit | Size1,
47 SignedSize2 = SignBit | Size2,
48 SignedSize4 = SignBit | Size4,
49 SignedSize8 = SignBit | Size8,
50 SignedSizeLEB = SignBit | SizeLEB,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/DWARF/ |
| D | DWARFExpression.cpp | 135 unsigned Signed = Size & Operation::SignBit; in extract()
140 switch (Size & ~Operation::SignBit) { in extract()
259 unsigned Signed = Size & Operation::SignBit; in print()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeFloatTypes.cpp | 302 SDValue SignBit = DAG.getNode( in SoftenFloatRes_FCOPYSIGN() local
306 SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit); in SoftenFloatRes_FCOPYSIGN()
311 SignBit = in SoftenFloatRes_FCOPYSIGN()
312 DAG.getNode(ISD::SRL, dl, RVT, SignBit, in SoftenFloatRes_FCOPYSIGN()
314 TLI.getShiftAmountTy(SignBit.getValueType(), in SoftenFloatRes_FCOPYSIGN()
316 SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit); in SoftenFloatRes_FCOPYSIGN()
318 SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit); in SoftenFloatRes_FCOPYSIGN()
319 SignBit = in SoftenFloatRes_FCOPYSIGN()
320 DAG.getNode(ISD::SHL, dl, LVT, SignBit, in SoftenFloatRes_FCOPYSIGN()
322 TLI.getShiftAmountTy(SignBit.getValueType(), in SoftenFloatRes_FCOPYSIGN()
[all …]
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| D | LegalizeDAG.cpp | 71 uint8_t SignBit; member
1454 State.SignBit = NumBits - 1; in getSignAsIntValue()
1489 State.SignBit = 7; in getSignAsIntValue()
1518 SDValue SignBit = DAG.getNode(ISD::AND, DL, IntVT, SignAsInt.IntValue, in ExpandFCOPYSIGN() local
1527 SDValue Cond = DAG.getSetCC(DL, getSetCCResultType(IntVT), SignBit, in ExpandFCOPYSIGN()
1541 int ShiftAmount = SignAsInt.SignBit - MagAsInt.SignBit; in ExpandFCOPYSIGN()
1543 if (SignBit.getValueSizeInBits() < ClearedSign.getValueSizeInBits()) { in ExpandFCOPYSIGN()
1544 SignBit = DAG.getNode(ISD::ZERO_EXTEND, DL, MagVT, SignBit); in ExpandFCOPYSIGN()
1549 SignBit = DAG.getNode(ISD::SRL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN()
1552 SignBit = DAG.getNode(ISD::SHL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN()
[all …]
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| D | DAGCombiner.cpp | 11232 SDValue SignBit = DAG.getConstant( in visitBITCAST() local
11236 FlipBit = SignBit; in visitBITCAST()
11245 FlipBit = DAG.getNode(ISD::AND, SDLoc(N0), MVT::i64, Hi, SignBit); in visitBITCAST()
11253 APInt SignBit = APInt::getSignMask(VT.getSizeInBits()); in visitBITCAST() local
11256 NewConv, DAG.getConstant(SignBit, DL, VT)); in visitBITCAST()
11259 NewConv, DAG.getConstant(~SignBit, DL, VT)); in visitBITCAST()
11301 APInt SignBit = APInt::getSignMask(VT.getSizeInBits() / 2); in visitBITCAST() local
11315 DAG.getConstant(SignBit, SDLoc(XorResult64), MVT::i64)); in visitBITCAST()
11322 APInt SignBit = APInt::getSignMask(VT.getSizeInBits()); in visitBITCAST() local
11324 X, DAG.getConstant(SignBit, SDLoc(X), VT)); in visitBITCAST()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.cpp | 973 APInt SignBit = APInt::getSignMask(32); in PerformDAGCombine() local
976 DAG.getConstant(SignBit, DL, MVT::i32)); in PerformDAGCombine()
981 DAG.getConstant(~SignBit, DL, MVT::i32)); in PerformDAGCombine()
1018 APInt SignBit = APInt::getSignMask(32).sext(64); in PerformDAGCombine() local
1022 DAG.getConstant(SignBit, DL, MVT::i64))); in PerformDAGCombine()
1027 DAG.getConstant(~SignBit, DL, MVT::i64))); in PerformDAGCombine()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPULegalizerInfo.cpp | 1452 auto SignBit = B.buildAnd(S32, Hi, SignBitMask); in legalizeIntrinsicTrunc() local
1459 auto SignBit64 = B.buildMerge(S64, {Zero32.getReg(0), SignBit.getReg(0)}); in legalizeIntrinsicTrunc()
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| D | AMDGPUISelLowering.cpp | 2100 SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask); in LowerFTRUNC() local
2103 SDValue SignBit64 = DAG.getBuildVector(MVT::v2i32, SL, {Zero, SignBit}); in LowerFTRUNC()
2423 const SDValue SignBit = DAG.getConstant(63, SL, MVT::i64); in LowerINT_TO_FP32() local
2424 S = DAG.getNode(ISD::SRA, SL, MVT::i64, L, SignBit); in LowerINT_TO_FP32()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 3952 auto SignBit = MIRBuilder.buildConstant(S64, 63); in lowerSITOFP() local
3953 auto S = MIRBuilder.buildAShr(S64, L, SignBit); in lowerSITOFP()
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| /third_party/rust/crates/bindgen/bindgen-tests/tests/ |
| D | stylo.hpp | 59476 int SignBit,
59482 static_assert(SignBit == 0 || SignBit == 1, "bad sign bit");
59489 (SignBit * Traits::kSignBit) | Traits::kExponentBits | Significand;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 20522 SDValue SignBit = DAG.getNode(X86ISD::FAND, dl, LogicVT, Sign, SignMask); in LowerFCOPYSIGN() local
20540 SDValue Or = DAG.getNode(X86ISD::FOR, dl, LogicVT, MagBits, SignBit); in LowerFCOPYSIGN()
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