Searched refs:Tst (Results 1 – 5 of 5) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.cpp | 353 MachineInstrBuilder MachineIRBuilder::buildBrCond(Register Tst, in buildBrCond() argument
355 assert(getMRI()->getType(Tst).isScalar() && "invalid operand type"); in buildBrCond()
357 return buildInstr(TargetOpcode::G_BRCOND).addUse(Tst).addMBB(&Dest); in buildBrCond()
715 const SrcOp &Tst, in buildSelect() argument
720 return buildInstr(TargetOpcode::G_SELECT, {Res}, {Tst, Op0, Op1}, Flags); in buildSelect()
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| D | IRTranslator.cpp | 390 Register Tst = getOrCreateVReg(*BrInst.getCondition()); in translateBr() local
393 MIRBuilder.buildBrCond(Tst, TrueBB); in translateBr()
1008 Register Tst = getOrCreateVReg(*U.getOperand(0)); in translateSelect() local
1020 {Tst, Op0Regs[i], Op1Regs[i]}, Flags); in translateSelect()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.h | 637 MachineInstrBuilder buildBrCond(Register Tst, MachineBasicBlock &Dest);
935 MachineInstrBuilder buildSelect(const DstOp &Res, const SrcOp &Tst,
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceInstARM32.h | 422 Tst, enumerator
1067 using InstARM32Tst = InstARM32CmpLike<InstARM32::Tst>;
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| D | IceInstARM32.cpp | 3461 template class InstARM32CmpLike<InstARM32::Tst>;
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