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Searched refs:UMAX (Results 1 – 25 of 48) sorted by relevance

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/third_party/musl/src/stdio/
Dvfwprintf.c34 LLONG, SIZET, IMAX, UMAX, PDIFF, UIPTR, enumerator
87 S('o') = UMAX, S('u') = UMAX,
88 S('x') = UMAX, S('X') = UMAX,
118 break; case UMAX: arg->i = va_arg(*ap, uintmax_t); in pop_arg()
Dvfprintf.c41 LLONG, SIZET, IMAX, UMAX, PDIFF, UIPTR, enumerator
94 S('o') = UMAX, S('u') = UMAX,
95 S('x') = UMAX, S('X') = UMAX,
125 break; case UMAX: arg->i = va_arg(*ap, uintmax_t); in pop_arg()
/third_party/musl/porting/liteos_m/kernel/src/stdio/
Dvfprintf.c46 LLONG, SIZET, IMAX, UMAX, PDIFF, UIPTR, enumerator
99 S('o') = UMAX, S('u') = UMAX,
100 S('x') = UMAX, S('X') = UMAX,
130 break; case UMAX: arg->i = va_arg(*ap, uintmax_t); in pop_arg()
/third_party/musl/porting/linux/user/src/stdio/
Dvfprintf.c41 LLONG, SIZET, IMAX, UMAX, PDIFF, UIPTR, enumerator
94 S('o') = UMAX, S('u') = UMAX,
95 S('x') = UMAX, S('X') = UMAX,
125 break; case UMAX: arg->i = va_arg(*ap, uintmax_t); in pop_arg()
/third_party/musl/porting/uniproton/kernel/src/stdio/
Dvfprintf.c46 LLONG, SIZET, IMAX, UMAX, PDIFF, UIPTR, enumerator
99 S('o') = UMAX, S('u') = UMAX,
100 S('x') = UMAX, S('X') = UMAX,
130 break; case UMAX: arg->i = va_arg(*ap, uintmax_t); in pop_arg()
/third_party/musl/porting/liteos_a/kernel/src/stdio/
Dvfprintf.c46 LLONG, SIZET, IMAX, UMAX, PDIFF, UIPTR, enumerator
99 S('o') = UMAX, S('u') = UMAX,
100 S('x') = UMAX, S('X') = UMAX,
130 break; case UMAX: arg->i = va_arg(*ap, uintmax_t); in pop_arg()
/third_party/ffmpeg/tests/ref/fate/
Dfilter-metadata-signalstats-yuv420p1 …ignalstats.UAVG=128|tag:lavfi.signalstats.UHIGH=128|tag:lavfi.signalstats.UMAX=128|tag:lavfi.signa…
Dfilter-metadata-signalstats-yuv420p101 …ignalstats.UAVG=512|tag:lavfi.signalstats.UHIGH=512|tag:lavfi.signalstats.UMAX=512|tag:lavfi.signa…
/third_party/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_opcode_tmp.h152 OP12(UMAX)
Dtgsi_info_opcodes.h133 OPCODE(1, 2, COMP, UMAX)
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h445 SMIN, SMAX, UMIN, UMAX, enumerator
DTargetLowering.h2242 case ISD::UMAX: in isCommutativeBinOp()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp269 case ISD::UMAX: return "umax"; in getOperationName()
DLegalizeIntegerTypes.cpp84 case ISD::UMAX: Res = PromoteIntRes_ZExtIntBinOp(N); break; in PromoteIntegerResult()
721 DAG.getNode(ISD::UMAX, dl, PromotedType, Op1Promoted, Op2Promoted); in PromoteIntRes_ADDSUBSAT()
1878 case ISD::UMAX: in ExpandIntegerResult()
2209 return std::make_pair(ISD::SETGT, ISD::UMAX); in getExpandedMinMaxOps()
2210 case ISD::UMAX: in getExpandedMinMaxOps()
2211 return std::make_pair(ISD::SETUGT, ISD::UMAX); in getExpandedMinMaxOps()
DLegalizeVectorTypes.cpp123 case ISD::UMAX: in ScalarizeVectorResult()
934 case ISD::UMAX: in SplitVectorResult()
2079 case ISD::VECREDUCE_UMAX: CombineOpc = ISD::UMAX; break; in SplitVecOp_VECREDUCE()
2726 case ISD::UMAX: in WidenVectorResult()
DLegalizeVectorOps.cpp445 case ISD::UMAX: in LegalizeOp()
DSelectionDAG.cpp3350 case ISD::UMAX: { in computeKnownBits()
3725 case ISD::UMAX: in ComputeNumSignBits()
4805 case ISD::UMAX: return C1.uge(C2) ? C1 : C2; in FoldValue()
5202 case ISD::UMAX: in getNode()
DTargetLowering.cpp7103 if (Opcode == ISD::USUBSAT && isOperationLegalOrCustom(ISD::UMAX, VT)) { in expandAddSubSat()
7104 SDValue Max = DAG.getNode(ISD::UMAX, dl, VT, LHS, RHS); in expandAddSubSat()
7620 case ISD::VECREDUCE_UMAX: BaseOpcode = ISD::UMAX; break; in expandVecReduce()
/third_party/mesa3d/src/broadcom/compiler/
Dv3d_compiler.h1334 VIR_A_ALU2(UMAX) in VIR_A_ALU2()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp453 setOperationAction(ISD::UMAX, MVT::i16, Legal); in SITargetLowering()
623 setOperationAction(ISD::UMAX, MVT::v2i16, Legal); in SITargetLowering()
650 setOperationAction(ISD::UMAX, MVT::v4i16, Custom); in SITargetLowering()
730 setTargetDAGCombine(ISD::UMAX); in SITargetLowering()
4098 case ISD::UMAX: in LowerOperation()
9025 case ISD::UMAX: in minMaxOpcToMin3Max3Opc()
9191 if (Opc == ISD::UMIN && Op0.getOpcode() == ISD::UMAX && Op0.hasOneUse()) { in performMinMaxCombine()
9316 case ISD::UMAX: in performExtractVectorEltCombine()
10009 case ISD::UMAX: in PerformDAGCombine()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsScheduleP5600.td635 (instregex "^ATOMIC_LOAD_(ADD|SUB|AND|OR|XOR|NAND|MIN|MAX|UMIN|UMAX)"
DMipsSEISelLowering.cpp349 setOperationAction(ISD::UMAX, Ty, Legal); in addMSAIntType()
2016 return DAG.getNode(ISD::UMAX, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN()
2028 return DAG.getNode(ISD::UMAX, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN()
DMipsScheduleGeneric.td1618 (instregex "^ATOMIC_LOAD_(ADD|SUB|AND|OR|XOR|NAND|MIN|MAX|UMIN|UMAX)"
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DTargetLoweringBase.cpp649 setOperationAction(ISD::UMAX, VT, Expand); in initActions()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.cpp186 for (auto Op : {ISD::SMIN, ISD::SMAX, ISD::UMIN, ISD::UMAX}) in WebAssemblyTargetLowering()

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