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1 /**************************************************************************
2  *
3  * Copyright 2003 VMware, Inc.
4  * All Rights Reserved.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the
8  * "Software"), to deal in the Software without restriction, including
9  * without limitation the rights to use, copy, modify, merge, publish,
10  * distribute, sub license, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  *
14  * The above copyright notice and this permission notice (including the
15  * next paragraph) shall be included in all copies or substantial portions
16  * of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25  *
26  **************************************************************************/
27 
28 #ifndef I915_REG_H
29 #define I915_REG_H
30 
31 #define I915_SET_FIELD(var, mask, value) (var &= ~(mask), var |= value)
32 
33 #define CMD_3D (0x3 << 29)
34 
35 #define PRIM3D_INLINE         (CMD_3D | (0x1f << 24))
36 #define PRIM3D_TRILIST        (0x0 << 18)
37 #define PRIM3D_TRISTRIP       (0x1 << 18)
38 #define PRIM3D_TRISTRIP_RVRSE (0x2 << 18)
39 #define PRIM3D_TRIFAN         (0x3 << 18)
40 #define PRIM3D_POLY           (0x4 << 18)
41 #define PRIM3D_LINELIST       (0x5 << 18)
42 #define PRIM3D_LINESTRIP      (0x6 << 18)
43 #define PRIM3D_RECTLIST       (0x7 << 18)
44 #define PRIM3D_POINTLIST      (0x8 << 18)
45 #define PRIM3D_DIB            (0x9 << 18)
46 #define PRIM3D_CLEAR_RECT     (0xa << 18)
47 #define PRIM3D_ZONE_INIT      (0xd << 18)
48 #define PRIM3D_MASK           (0x1f << 18)
49 
50 /* p137 */
51 #define _3DSTATE_AA_CMD             (CMD_3D | (0x06 << 24))
52 #define AA_LINE_ECAAR_WIDTH_ENABLE  (1 << 16)
53 #define AA_LINE_ECAAR_WIDTH_0_5     0
54 #define AA_LINE_ECAAR_WIDTH_1_0     (1 << 14)
55 #define AA_LINE_ECAAR_WIDTH_2_0     (2 << 14)
56 #define AA_LINE_ECAAR_WIDTH_4_0     (3 << 14)
57 #define AA_LINE_REGION_WIDTH_ENABLE (1 << 8)
58 #define AA_LINE_REGION_WIDTH_0_5    0
59 #define AA_LINE_REGION_WIDTH_1_0    (1 << 6)
60 #define AA_LINE_REGION_WIDTH_2_0    (2 << 6)
61 #define AA_LINE_REGION_WIDTH_4_0    (3 << 6)
62 
63 /* 3DSTATE_BACKFACE_STENCIL_OPS, p138*/
64 #define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8 << 24))
65 #define BFO_ENABLE_STENCIL_REF        (1 << 23)
66 #define BFO_STENCIL_REF_SHIFT         15
67 #define BFO_STENCIL_REF_MASK          (0xff << 15)
68 #define BFO_ENABLE_STENCIL_FUNCS      (1 << 14)
69 #define BFO_STENCIL_TEST_SHIFT        11
70 #define BFO_STENCIL_TEST_MASK         (0x7 << 11)
71 #define BFO_STENCIL_FAIL_SHIFT        8
72 #define BFO_STENCIL_FAIL_MASK         (0x7 << 8)
73 #define BFO_STENCIL_PASS_Z_FAIL_SHIFT 5
74 #define BFO_STENCIL_PASS_Z_FAIL_MASK  (0x7 << 5)
75 #define BFO_STENCIL_PASS_Z_PASS_SHIFT 2
76 #define BFO_STENCIL_PASS_Z_PASS_MASK  (0x7 << 2)
77 #define BFO_ENABLE_STENCIL_TWO_SIDE   (1 << 1)
78 #define BFO_STENCIL_TWO_SIDE          (1 << 0)
79 
80 /* 3DSTATE_BACKFACE_STENCIL_MASKS, p140 */
81 #define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9 << 24))
82 #define BFM_ENABLE_STENCIL_TEST_MASK    (1 << 17)
83 #define BFM_ENABLE_STENCIL_WRITE_MASK   (1 << 16)
84 #define BFM_STENCIL_TEST_MASK_SHIFT     8
85 #define BFM_STENCIL_TEST_MASK_MASK      (0xff << 8)
86 #define BFM_STENCIL_WRITE_MASK_SHIFT    0
87 #define BFM_STENCIL_WRITE_MASK_MASK     (0xff << 0)
88 
89 /* 3DSTATE_BIN_CONTROL p141 */
90 
91 /* p143 */
92 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d << 24) | (0x8e << 16) | 1)
93 /* Dword 1 */
94 #define BUF_3D_ID_COLOR_BACK (0x3 << 24)
95 #define BUF_3D_ID_DEPTH      (0x7 << 24)
96 #define BUF_3D_USE_FENCE     (1 << 23)
97 #define BUF_3D_TILED_SURFACE (1 << 22)
98 #define BUF_3D_TILE_WALK_X   0
99 #define BUF_3D_TILE_WALK_Y   (1 << 21)
100 #define BUF_3D_PITCH(x)      (((x) / 4) << 2)
101 /* Dword 2 */
102 #define BUF_3D_ADDR(x) ((x) & ~0x3)
103 
104 /* 3DSTATE_CHROMA_KEY */
105 
106 /* 3DSTATE_CLEAR_PARAMETERS, p150 */
107 #define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d << 24) | (0x9c << 16) | 5)
108 /* Dword 1 */
109 #define CLEARPARAM_CLEAR_RECT    (1 << 16)
110 #define CLEARPARAM_ZONE_INIT     (0 << 16)
111 #define CLEARPARAM_WRITE_COLOR   (1 << 2)
112 #define CLEARPARAM_WRITE_DEPTH   (1 << 1)
113 #define CLEARPARAM_WRITE_STENCIL (1 << 0)
114 
115 /* 3DSTATE_CONSTANT_BLEND_COLOR, p153 */
116 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d << 24) | (0x88 << 16))
117 
118 /* 3DSTATE_COORD_SET_BINDINGS, p154 */
119 #define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16 << 24))
120 #define CSB_TCB(iunit, eunit)       ((eunit) << (iunit * 3))
121 
122 /* p156 */
123 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d << 24) | (0x99 << 16))
124 
125 /* p157 */
126 #define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d << 24) | (0x9a << 16))
127 
128 /* p158 */
129 #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d << 24) | (0x98 << 16))
130 
131 /* 3DSTATE_DEPTH_OFFSET_SCALE, p159 */
132 #define _3DSTATE_DEPTH_OFFSET_SCALE (CMD_3D | (0x1d << 24) | (0x97 << 16))
133 /* scale in dword 1 */
134 
135 /* 3DSTATE_DEPTH_SUBRECT_DISABLE, p160 */
136 #define _3DSTATE_DEPTH_SUBRECT_DISABLE                                         \
137    (CMD_3D | (0x1c << 24) | (0x11 << 19) | 0x2)
138 
139 /* p161 */
140 #define _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d << 24) | (0x85 << 16))
141 /* Dword 1 */
142 #define CLASSIC_EARLY_DEPTH         (1 << 31)
143 #define TEX_DEFAULT_COLOR_OGL       (0 << 30)
144 #define TEX_DEFAULT_COLOR_D3D       (1 << 30)
145 #define ZR_EARLY_DEPTH              (1 << 29)
146 #define LOD_PRECLAMP_OGL            (1 << 28)
147 #define LOD_PRECLAMP_D3D            (0 << 28)
148 #define DITHER_FULL_ALWAYS          (0 << 26)
149 #define DITHER_FULL_ON_FB_BLEND     (1 << 26)
150 #define DITHER_CLAMPED_ALWAYS       (2 << 26)
151 #define LINEAR_GAMMA_BLEND_32BPP    (1 << 25)
152 #define DEBUG_DISABLE_ENH_DITHER    (1 << 24)
153 #define DSTORG_HORT_BIAS(x)         ((x) << 20)
154 #define DSTORG_VERT_BIAS(x)         ((x) << 16)
155 #define COLOR_4_2_2_CHNL_WRT_ALL    0
156 #define COLOR_4_2_2_CHNL_WRT_Y      (1 << 12)
157 #define COLOR_4_2_2_CHNL_WRT_CR     (2 << 12)
158 #define COLOR_4_2_2_CHNL_WRT_CB     (3 << 12)
159 #define COLOR_4_2_2_CHNL_WRT_CRCB   (4 << 12)
160 #define COLOR_BUF_8BIT              0
161 #define COLOR_BUF_RGB555            (1 << 8)
162 #define COLOR_BUF_RGB565            (2 << 8)
163 #define COLOR_BUF_ARGB8888          (3 << 8)
164 #define COLOR_BUF_YCRCB_SWAP        (4 << 8)
165 #define COLOR_BUF_YCRCB_NORMAL      (5 << 8)
166 #define COLOR_BUF_YCRCB_SWAPUV      (6 << 8)
167 #define COLOR_BUF_YCRCB_SWAPUVY     (7 << 8)
168 #define COLOR_BUF_ARGB4444          (8 << 8)
169 #define COLOR_BUF_ARGB1555          (9 << 8)
170 #define COLOR_BUF_ARGB2101010       (10 << 8)
171 #define DEPTH_FRMT_16_FIXED         0
172 #define DEPTH_FRMT_16_FLOAT         (1 << 2)
173 #define DEPTH_FRMT_24_FIXED_8_OTHER (2 << 2)
174 #define VERT_LINE_STRIDE_1          (1 << 1)
175 #define VERT_LINE_STRIDE_0          (0 << 1)
176 #define VERT_LINE_STRIDE_OFS_1      1
177 #define VERT_LINE_STRIDE_OFS_0      0
178 
179 /* p166 */
180 #define _3DSTATE_DRAW_RECT_CMD (CMD_3D | (0x1d << 24) | (0x80 << 16) | 3)
181 /* Dword 1 */
182 #define DRAW_RECT_DIS_DEPTH_OFS (1 << 30)
183 #define DRAW_DITHER_OFS_X(x)    ((x) << 26)
184 #define DRAW_DITHER_OFS_Y(x)    ((x) << 24)
185 /* Dword 2 */
186 #define DRAW_YMIN(x) ((x) << 16)
187 #define DRAW_XMIN(x) (x)
188 /* Dword 3 */
189 #define DRAW_YMAX(x) ((x) << 16)
190 #define DRAW_XMAX(x) (x)
191 /* Dword 4 */
192 #define DRAW_YORG(x) ((x) << 16)
193 #define DRAW_XORG(x) (x)
194 
195 /* 3DSTATE_FILTER_COEFFICIENTS_4X4, p170 */
196 
197 /* 3DSTATE_FILTER_COEFFICIENTS_6X5, p172 */
198 
199 /* _3DSTATE_FOG_COLOR, p173 */
200 #define _3DSTATE_FOG_COLOR_CMD (CMD_3D | (0x15 << 24))
201 #define FOG_COLOR_RED(x)       ((x) << 16)
202 #define FOG_COLOR_GREEN(x)     ((x) << 8)
203 #define FOG_COLOR_BLUE(x)      (x)
204 
205 /* _3DSTATE_FOG_MODE, p174 */
206 #define _3DSTATE_FOG_MODE_CMD (CMD_3D | (0x1d << 24) | (0x89 << 16) | 2)
207 /* Dword 1 */
208 #define FMC1_FOGFUNC_MODIFY_ENABLE  (1 << 31)
209 #define FMC1_FOGFUNC_VERTEX         (0 << 28)
210 #define FMC1_FOGFUNC_PIXEL_EXP      (1 << 28)
211 #define FMC1_FOGFUNC_PIXEL_EXP2     (2 << 28)
212 #define FMC1_FOGFUNC_PIXEL_LINEAR   (3 << 28)
213 #define FMC1_FOGFUNC_MASK           (3 << 28)
214 #define FMC1_FOGINDEX_MODIFY_ENABLE (1 << 27)
215 #define FMC1_FOGINDEX_Z             (0 << 25)
216 #define FMC1_FOGINDEX_W             (1 << 25)
217 #define FMC1_C1_C2_MODIFY_ENABLE    (1 << 24)
218 #define FMC1_DENSITY_MODIFY_ENABLE  (1 << 23)
219 #define FMC1_C1_ONE                 (1 << 13)
220 #define FMC1_C1_MASK                (0xffff << 4)
221 /* Dword 2 */
222 #define FMC2_C2_ONE (1 << 16)
223 /* Dword 3 */
224 #define FMC3_D_ONE (1 << 16)
225 
226 /* _3DSTATE_INDEPENDENT_ALPHA_BLEND, p177 */
227 #define _3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD (CMD_3D | (0x0b << 24))
228 #define IAB_MODIFY_ENABLE                    (1 << 23)
229 #define IAB_ENABLE                           (1 << 22)
230 #define IAB_MODIFY_FUNC                      (1 << 21)
231 #define IAB_FUNC_SHIFT                       16
232 #define IAB_MODIFY_SRC_FACTOR                (1 << 11)
233 #define IAB_SRC_FACTOR_SHIFT                 6
234 #define IAB_SRC_FACTOR_MASK                  (BLENDFACT_MASK << 6)
235 #define IAB_MODIFY_DST_FACTOR                (1 << 5)
236 #define IAB_DST_FACTOR_SHIFT                 0
237 #define IAB_DST_FACTOR_MASK                  (BLENDFACT_MASK << 0)
238 
239 #define BLENDFUNC_ADD              0x0
240 #define BLENDFUNC_SUBTRACT         0x1
241 #define BLENDFUNC_REVERSE_SUBTRACT 0x2
242 #define BLENDFUNC_MIN              0x3
243 #define BLENDFUNC_MAX              0x4
244 #define BLENDFUNC_MASK             0x7
245 
246 /* 3DSTATE_LOAD_INDIRECT, p180 */
247 
248 #define _3DSTATE_LOAD_INDIRECT     (CMD_3D | (0x1d << 24) | (0x7 << 16))
249 #define LI0_STATE_STATIC_INDIRECT  (0x01 << 8)
250 #define LI0_STATE_DYNAMIC_INDIRECT (0x02 << 8)
251 #define LI0_STATE_SAMPLER          (0x04 << 8)
252 #define LI0_STATE_MAP              (0x08 << 8)
253 #define LI0_STATE_PROGRAM          (0x10 << 8)
254 #define LI0_STATE_CONSTANTS        (0x20 << 8)
255 
256 #define SIS0_BUFFER_ADDRESS(x) ((x) & ~0x3)
257 #define SIS0_FORCE_LOAD        (1 << 1)
258 #define SIS0_BUFFER_VALID      (1 << 0)
259 #define SIS1_BUFFER_LENGTH(x)  ((x)&0xff)
260 
261 #define DIS0_BUFFER_ADDRESS(x) ((x) & ~0x3)
262 #define DIS0_BUFFER_RESET      (1 << 1)
263 #define DIS0_BUFFER_VALID      (1 << 0)
264 
265 #define SSB0_BUFFER_ADDRESS(x) ((x) & ~0x3)
266 #define SSB0_FORCE_LOAD        (1 << 1)
267 #define SSB0_BUFFER_VALID      (1 << 0)
268 #define SSB1_BUFFER_LENGTH(x)  ((x)&0xff)
269 
270 #define MSB0_BUFFER_ADDRESS(x) ((x) & ~0x3)
271 #define MSB0_FORCE_LOAD        (1 << 1)
272 #define MSB0_BUFFER_VALID      (1 << 0)
273 #define MSB1_BUFFER_LENGTH(x)  ((x)&0xff)
274 
275 #define PSP0_BUFFER_ADDRESS(x) ((x) & ~0x3)
276 #define PSP0_FORCE_LOAD        (1 << 1)
277 #define PSP0_BUFFER_VALID      (1 << 0)
278 #define PSP1_BUFFER_LENGTH(x)  ((x)&0xff)
279 
280 #define PSC0_BUFFER_ADDRESS(x) ((x) & ~0x3)
281 #define PSC0_FORCE_LOAD        (1 << 1)
282 #define PSC0_BUFFER_VALID      (1 << 0)
283 #define PSC1_BUFFER_LENGTH(x)  ((x)&0xff)
284 
285 /* _3DSTATE_RASTERIZATION_RULES */
286 #define _3DSTATE_RASTER_RULES_CMD      (CMD_3D | (0x07 << 24))
287 #define ENABLE_POINT_RASTER_RULE       (1 << 15)
288 #define OGL_POINT_RASTER_RULE          (1 << 13)
289 #define ENABLE_TEXKILL_3D_4D           (1 << 10)
290 #define TEXKILL_3D                     (0 << 9)
291 #define TEXKILL_4D                     (1 << 9)
292 #define ENABLE_LINE_STRIP_PROVOKE_VRTX (1 << 8)
293 #define ENABLE_TRI_FAN_PROVOKE_VRTX    (1 << 5)
294 #define LINE_STRIP_PROVOKE_VRTX(x)     ((x) << 6)
295 #define TRI_FAN_PROVOKE_VRTX(x)        ((x) << 3)
296 
297 /* _3DSTATE_SCISSOR_ENABLE, p256 */
298 #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D | (0x1c << 24) | (0x10 << 19))
299 #define ENABLE_SCISSOR_RECT         ((1 << 1) | 1)
300 #define DISABLE_SCISSOR_RECT        (1 << 1)
301 
302 /* _3DSTATE_SCISSOR_RECTANGLE_0, p257 */
303 #define _3DSTATE_SCISSOR_RECT_0_CMD (CMD_3D | (0x1d << 24) | (0x81 << 16) | 1)
304 /* Dword 1 */
305 #define SCISSOR_RECT_0_YMIN(x) ((x) << 16)
306 #define SCISSOR_RECT_0_XMIN(x) (x)
307 /* Dword 2 */
308 #define SCISSOR_RECT_0_YMAX(x) ((x) << 16)
309 #define SCISSOR_RECT_0_XMAX(x) (x)
310 
311 /* p189 */
312 #define _3DSTATE_LOAD_STATE_IMMEDIATE_1                                        \
313    ((0x3 << 29) | (0x1d << 24) | (0x04 << 16))
314 #define I1_LOAD_S(n) (1 << (4 + n))
315 
316 #define S0_VB_OFFSET_MASK         0xffffffc
317 #define S0_AUTO_CACHE_INV_DISABLE (1 << 0)
318 
319 #define S1_VERTEX_WIDTH_SHIFT 24
320 #define S1_VERTEX_WIDTH_MASK  (0x3f << 24)
321 #define S1_VERTEX_PITCH_SHIFT 16
322 #define S1_VERTEX_PITCH_MASK  (0x3f << 16)
323 
324 #define TEXCOORDFMT_2D              0x0
325 #define TEXCOORDFMT_3D              0x1
326 #define TEXCOORDFMT_4D              0x2
327 #define TEXCOORDFMT_1D              0x3
328 #define TEXCOORDFMT_2D_16           0x4
329 #define TEXCOORDFMT_4D_16           0x5
330 #define TEXCOORDFMT_NOT_PRESENT     0xf
331 #define S2_TEXCOORD_FMT0_MASK       0xf
332 #define S2_TEXCOORD_FMT1_SHIFT      4
333 #define S2_TEXCOORD_FMT(unit, type) ((type) << (unit * 4))
334 #define S2_TEXCOORD_NONE            (~0)
335 
336 /* S3 not interesting */
337 
338 #define S4_POINT_WIDTH_SHIFT         23
339 #define S4_POINT_WIDTH_MASK          (0x1ff << 23)
340 #define S4_LINE_WIDTH_SHIFT          19
341 #define S4_LINE_WIDTH_ONE            (0x2 << 19)
342 #define S4_LINE_WIDTH_MASK           (0xf << 19)
343 #define S4_FLATSHADE_ALPHA           (1 << 18)
344 #define S4_FLATSHADE_FOG             (1 << 17)
345 #define S4_FLATSHADE_SPECULAR        (1 << 16)
346 #define S4_FLATSHADE_COLOR           (1 << 15)
347 #define S4_CULLMODE_BOTH             (0 << 13)
348 #define S4_CULLMODE_NONE             (1 << 13)
349 #define S4_CULLMODE_CW               (2 << 13)
350 #define S4_CULLMODE_CCW              (3 << 13)
351 #define S4_CULLMODE_MASK             (3 << 13)
352 #define S4_VFMT_POINT_WIDTH          (1 << 12)
353 #define S4_VFMT_SPEC_FOG             (1 << 11)
354 #define S4_VFMT_COLOR                (1 << 10)
355 #define S4_VFMT_DEPTH_OFFSET         (1 << 9)
356 #define S4_VFMT_XYZ                  (1 << 6)
357 #define S4_VFMT_XYZW                 (2 << 6)
358 #define S4_VFMT_XY                   (3 << 6)
359 #define S4_VFMT_XYW                  (4 << 6)
360 #define S4_VFMT_XYZW_MASK            (7 << 6)
361 #define S4_FORCE_DEFAULT_DIFFUSE     (1 << 5)
362 #define S4_FORCE_DEFAULT_SPECULAR    (1 << 4)
363 #define S4_LOCAL_DEPTH_OFFSET_ENABLE (1 << 3)
364 #define S4_VFMT_FOG_PARAM            (1 << 2)
365 #define S4_SPRITE_POINT_ENABLE       (1 << 1)
366 #define S4_LINE_ANTIALIAS_ENABLE     (1 << 0)
367 
368 #define S4_VFMT_MASK                                                           \
369    (S4_VFMT_POINT_WIDTH | S4_VFMT_SPEC_FOG | S4_VFMT_COLOR |                   \
370     S4_VFMT_DEPTH_OFFSET | S4_VFMT_XYZW_MASK | S4_VFMT_FOG_PARAM)
371 
372 #define S5_WRITEDISABLE_ALPHA         (1 << 31)
373 #define S5_WRITEDISABLE_RED           (1 << 30)
374 #define S5_WRITEDISABLE_GREEN         (1 << 29)
375 #define S5_WRITEDISABLE_BLUE          (1 << 28)
376 #define S5_WRITEDISABLE_MASK          (0xf << 28)
377 #define S5_FORCE_DEFAULT_POINT_SIZE   (1 << 27)
378 #define S5_LAST_PIXEL_ENABLE          (1 << 26)
379 #define S5_GLOBAL_DEPTH_OFFSET_ENABLE (1 << 25)
380 #define S5_FOG_ENABLE                 (1 << 24)
381 #define S5_STENCIL_REF_SHIFT          16
382 #define S5_STENCIL_REF_MASK           (0xff << 16)
383 #define S5_STENCIL_TEST_FUNC_SHIFT    13
384 #define S5_STENCIL_TEST_FUNC_MASK     (0x7 << 13)
385 #define S5_STENCIL_FAIL_SHIFT         10
386 #define S5_STENCIL_FAIL_MASK          (0x7 << 10)
387 #define S5_STENCIL_PASS_Z_FAIL_SHIFT  7
388 #define S5_STENCIL_PASS_Z_FAIL_MASK   (0x7 << 7)
389 #define S5_STENCIL_PASS_Z_PASS_SHIFT  4
390 #define S5_STENCIL_PASS_Z_PASS_MASK   (0x7 << 4)
391 #define S5_STENCIL_WRITE_ENABLE       (1 << 3)
392 #define S5_STENCIL_TEST_ENABLE        (1 << 2)
393 #define S5_COLOR_DITHER_ENABLE        (1 << 1)
394 #define S5_LOGICOP_ENABLE             (1 << 0)
395 
396 #define S6_ALPHA_TEST_ENABLE         (1 << 31)
397 #define S6_ALPHA_TEST_FUNC_SHIFT     28
398 #define S6_ALPHA_TEST_FUNC_MASK      (0x7 << 28)
399 #define S6_ALPHA_REF_SHIFT           20
400 #define S6_ALPHA_REF_MASK            (0xff << 20)
401 #define S6_DEPTH_TEST_ENABLE         (1 << 19)
402 #define S6_DEPTH_TEST_FUNC_SHIFT     16
403 #define S6_DEPTH_TEST_FUNC_MASK      (0x7 << 16)
404 #define S6_CBUF_BLEND_ENABLE         (1 << 15)
405 #define S6_CBUF_BLEND_FUNC_SHIFT     12
406 #define S6_CBUF_BLEND_FUNC_MASK      (0x7 << 12)
407 #define S6_CBUF_SRC_BLEND_FACT_SHIFT 8
408 #define S6_CBUF_SRC_BLEND_FACT_MASK  (0xf << 8)
409 #define S6_CBUF_DST_BLEND_FACT_SHIFT 4
410 #define S6_CBUF_DST_BLEND_FACT_MASK  (0xf << 4)
411 #define S6_DEPTH_WRITE_ENABLE        (1 << 3)
412 #define S6_COLOR_WRITE_ENABLE        (1 << 2)
413 #define S6_TRISTRIP_PV_SHIFT         0
414 #define S6_TRISTRIP_PV_MASK          (0x3 << 0)
415 
416 #define S7_DEPTH_OFFSET_CONST_MASK ~0
417 
418 #define DST_BLND_FACT(f)  ((f) << S6_CBUF_DST_BLEND_FACT_SHIFT)
419 #define SRC_BLND_FACT(f)  ((f) << S6_CBUF_SRC_BLEND_FACT_SHIFT)
420 #define DST_ABLND_FACT(f) ((f) << IAB_DST_FACTOR_SHIFT)
421 #define SRC_ABLND_FACT(f) ((f) << IAB_SRC_FACTOR_SHIFT)
422 
423 /* 3DSTATE_MAP_DEINTERLACER_PARAMETERS */
424 
425 /* 3DSTATE_MAP_PALETTE_LOAD_32, p206 */
426 #define _3DSTATE_MAP_PALETTE_LOAD_32 (CMD_3D | (0x1d << 24) | (0x8f << 16))
427 /* subsequent dwords up to length (max 16) are ARGB8888 color values */
428 
429 /* _3DSTATE_MODES_4, p218 */
430 #define _3DSTATE_MODES_4_CMD            (CMD_3D | (0x0d << 24))
431 #define ENABLE_LOGIC_OP_FUNC            (1 << 23)
432 #define LOGIC_OP_FUNC(x)                ((x) << 18)
433 #define LOGICOP_MASK                    (0xf << 18)
434 #define MODE4_ENABLE_STENCIL_TEST_MASK  ((1 << 17) | (0xff00))
435 #define ENABLE_STENCIL_TEST_MASK        (1 << 17)
436 #define STENCIL_TEST_MASK(x)            (((x)&0xff) << 8)
437 #define MODE4_ENABLE_STENCIL_WRITE_MASK ((1 << 16) | (0x00ff))
438 #define ENABLE_STENCIL_WRITE_MASK       (1 << 16)
439 #define STENCIL_WRITE_MASK(x)           ((x)&0xff)
440 
441 /* _3DSTATE_MODES_5, p220 */
442 #define _3DSTATE_MODES_5_CMD         (CMD_3D | (0x0c << 24))
443 #define PIPELINE_FLUSH_RENDER_CACHE  (1 << 18)
444 #define PIPELINE_FLUSH_TEXTURE_CACHE (1 << 16)
445 
446 /* p221 */
447 #define _3DSTATE_PIXEL_SHADER_CONSTANTS (CMD_3D | (0x1d << 24) | (0x6 << 16))
448 #define PS1_REG(n)                      (1 << (n))
449 #define PS2_CONST_X(n)                  (n)
450 #define PS3_CONST_Y(n)                  (n)
451 #define PS4_CONST_Z(n)                  (n)
452 #define PS5_CONST_W(n)                  (n)
453 
454 /* p222 */
455 
456 #define I915_MAX_TEX_INDIRECT 4
457 #define I915_MAX_TEX_INSN     32
458 #define I915_MAX_ALU_INSN     64
459 #define I915_MAX_DECL_INSN    27
460 #define I915_MAX_TEMPORARY    16
461 
462 /* Each instruction is 3 dwords long, though most don't require all
463  * this space.  Maximum of 123 instructions.  Smaller maxes per insn
464  * type.
465  */
466 #define _3DSTATE_PIXEL_SHADER_PROGRAM (CMD_3D | (0x1d << 24) | (0x5 << 16))
467 
468 #define REG_TYPE_R                                                             \
469    0 /* temporary regs, no need to                                             \
470       * dcl, must be written before                                            \
471       * read -- Preserved between                                              \
472       * phases.                                                                \
473       */
474 #define REG_TYPE_T                                                             \
475    1 /* Interpolated values, must be                                           \
476       * dcl'ed before use.                                                     \
477       *                                                                        \
478       * 0..7: texture coord,                                                   \
479       * 8: diffuse spec,                                                       \
480       * 9: specular color,                                                     \
481       * 10: fog parameter in w.                                                \
482       */
483 #define REG_TYPE_CONST                                                         \
484    2                  /* Restriction: only one const                           \
485                        * can be referenced per                                 \
486                        * instruction, though it may be                         \
487                        * selected for multiple inputs.                         \
488                        * Constants not initialized                             \
489                        * default to zero.                                      \
490                        */
491 #define REG_TYPE_S  3 /* sampler */
492 #define REG_TYPE_OC 4 /* output color (rgba) */
493 #define REG_TYPE_OD                                                            \
494    5                    /* output depth (w), xyz are                           \
495                          * temporaries.  If not written,                       \
496                          * interpolated depth is used?                         \
497                          */
498 #define REG_TYPE_U    6 /* unpreserved temporaries */
499 #define REG_TYPE_MASK 0x7
500 #define REG_NR_MASK   0xf
501 
502 /* REG_TYPE_T:
503  */
504 #define T_TEX0     0
505 #define T_TEX1     1
506 #define T_TEX2     2
507 #define T_TEX3     3
508 #define T_TEX4     4
509 #define T_TEX5     5
510 #define T_TEX6     6
511 #define T_TEX7     7
512 #define T_DIFFUSE  8
513 #define T_SPECULAR 9
514 #define T_FOG_W    10 /* interpolated fog is in W coord */
515 
516 /* Arithmetic instructions */
517 
518 /* .replicate_swizzle == selection and replication of a particular
519  * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww
520  */
521 #define A0_NOP (0x0 << 24) /* no operation */
522 #define A0_ADD (0x1 << 24) /* dst = src0 + src1 */
523 #define A0_MOV (0x2 << 24) /* dst = src0 */
524 #define A0_MUL (0x3 << 24) /* dst = src0 * src1 */
525 #define A0_MAD (0x4 << 24) /* dst = src0 * src1 + src2 */
526 #define A0_DP2ADD                                                              \
527    (0x5 << 24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */
528 #define A0_DP3 (0x6 << 24) /* dst.xyzw = src0.xyz dot src1.xyz */
529 #define A0_DP4 (0x7 << 24) /* dst.xyzw = src0.xyzw dot src1.xyzw */
530 #define A0_FRC (0x8 << 24) /* dst = src0 - floor(src0) */
531 #define A0_RCP (0x9 << 24) /* dst.xyzw = 1/(src0.replicate_swizzle) */
532 #define A0_RSQ                                                                 \
533    (0xa << 24) /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */
534 #define A0_EXP             (0xb << 24) /* dst.xyzw = exp2(src0.replicate_swizzle) */
535 #define A0_LOG             (0xc << 24) /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */
536 #define A0_CMP             (0xd << 24)  /* dst = (src0 >= 0.0) ? src1 : src2 */
537 #define A0_MIN             (0xe << 24)  /* dst = (src0 < src1) ? src0 : src1 */
538 #define A0_MAX             (0xf << 24)  /* dst = (src0 >= src1) ? src0 : src1 */
539 #define A0_FLR             (0x10 << 24) /* dst = floor(src0) */
540 #define A0_MOD             (0x11 << 24) /* dst = src0 fmod 1.0 */
541 #define A0_TRC             (0x12 << 24) /* dst = int(src0) */
542 #define A0_SGE             (0x13 << 24) /* dst = src0 >= src1 ? 1.0 : 0.0 */
543 #define A0_SLT             (0x14 << 24) /* dst = src0 < src1 ? 1.0 : 0.0 */
544 #define A0_DEST_SATURATE   (1 << 22)
545 #define A0_DEST_TYPE_SHIFT 19
546 /* Allow: R, OC, OD, U */
547 #define A0_DEST_NR_SHIFT 14
548 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */
549 #define A0_DEST_CHANNEL_X     (1 << 10)
550 #define A0_DEST_CHANNEL_Y     (2 << 10)
551 #define A0_DEST_CHANNEL_Z     (4 << 10)
552 #define A0_DEST_CHANNEL_W     (8 << 10)
553 #define A0_DEST_CHANNEL_ALL   (0xf << 10)
554 #define A0_DEST_CHANNEL_SHIFT 10
555 #define A0_SRC0_TYPE_SHIFT    7
556 #define A0_SRC0_NR_SHIFT      2
557 
558 #define A0_DEST_CHANNEL_XY  (A0_DEST_CHANNEL_X | A0_DEST_CHANNEL_Y)
559 #define A0_DEST_CHANNEL_XYZ (A0_DEST_CHANNEL_XY | A0_DEST_CHANNEL_Z)
560 
561 #define SRC_X    0
562 #define SRC_Y    1
563 #define SRC_Z    2
564 #define SRC_W    3
565 #define SRC_ZERO 4
566 #define SRC_ONE  5
567 
568 #define A1_SRC0_CHANNEL_X_NEGATE (1 << 31)
569 #define A1_SRC0_CHANNEL_X_SHIFT  28
570 #define A1_SRC0_CHANNEL_Y_NEGATE (1 << 27)
571 #define A1_SRC0_CHANNEL_Y_SHIFT  24
572 #define A1_SRC0_CHANNEL_Z_NEGATE (1 << 23)
573 #define A1_SRC0_CHANNEL_Z_SHIFT  20
574 #define A1_SRC0_CHANNEL_W_NEGATE (1 << 19)
575 #define A1_SRC0_CHANNEL_W_SHIFT  16
576 #define A1_SRC1_TYPE_SHIFT       13
577 #define A1_SRC1_NR_SHIFT         8
578 #define A1_SRC1_CHANNEL_X_NEGATE (1 << 7)
579 #define A1_SRC1_CHANNEL_X_SHIFT  4
580 #define A1_SRC1_CHANNEL_Y_NEGATE (1 << 3)
581 #define A1_SRC1_CHANNEL_Y_SHIFT  0
582 
583 #define A2_SRC1_CHANNEL_Z_NEGATE (1 << 31)
584 #define A2_SRC1_CHANNEL_Z_SHIFT  28
585 #define A2_SRC1_CHANNEL_W_NEGATE (1 << 27)
586 #define A2_SRC1_CHANNEL_W_SHIFT  24
587 #define A2_SRC2_TYPE_SHIFT       21
588 #define A2_SRC2_NR_SHIFT         16
589 #define A2_SRC2_CHANNEL_X_NEGATE (1 << 15)
590 #define A2_SRC2_CHANNEL_X_SHIFT  12
591 #define A2_SRC2_CHANNEL_Y_NEGATE (1 << 11)
592 #define A2_SRC2_CHANNEL_Y_SHIFT  8
593 #define A2_SRC2_CHANNEL_Z_NEGATE (1 << 7)
594 #define A2_SRC2_CHANNEL_Z_SHIFT  4
595 #define A2_SRC2_CHANNEL_W_NEGATE (1 << 3)
596 #define A2_SRC2_CHANNEL_W_SHIFT  0
597 
598 /* Texture instructions */
599 #define T0_TEXLD                                                               \
600    (0x15 << 24) /* Sample texture using predeclared                            \
601                  * sampler and address, and output                             \
602                  * filtered texel data to destination                          \
603                  * register */
604 #define T0_TEXLDP                                                              \
605    (0x16 << 24) /* Same as texld but performs a                                \
606                  * perspective divide of the texture                           \
607                  * coordinate .xyz values by .w before                         \
608                  * sampling. */
609 #define T0_TEXLDB                                                              \
610    (0x17 << 24) /* Same as texld but biases the                                \
611                  * computed LOD by w.  Only S4.6 two's                         \
612                  * comp is used.  This implies that a                          \
613                  * float to fixed conversion is                                \
614                  * done. */
615 #define T0_TEXKILL                                                             \
616    (0x18 << 24) /* Does not perform a sampling                                 \
617                  * operation.  Simply kills the pixel                          \
618                  * if any channel of the address                               \
619                  * register is < 0.0. */
620 #define T0_DEST_TYPE_SHIFT 19
621 /* Allow: R, OC, OD, U */
622 /* Note: U (unpreserved) regs do not retain their values between
623  * phases (cannot be used for feedback)
624  *
625  * Note: oC and OD registers can only be used as the destination of a
626  * texture instruction once per phase (this is an implementation
627  * restriction).
628  */
629 #define T0_DEST_NR_SHIFT 14
630 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */
631 #define T0_SAMPLER_NR_SHIFT 0 /* This field ignored for TEXKILL */
632 #define T0_SAMPLER_NR_MASK  (0xf << 0)
633 
634 #define T1_ADDRESS_REG_TYPE_SHIFT 24 /* Reg to use as texture coord */
635 /* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */
636 #define T1_ADDRESS_REG_NR_SHIFT 17
637 #define T2_MBZ                  0
638 
639 /* Declaration instructions */
640 #define D0_DCL                                                                 \
641    (0x19 << 24) /* Declare a t (interpolated attrib)                           \
642                  * register or an s (sampler)                                  \
643                  * register. */
644 #define D0_SAMPLE_TYPE_SHIFT  22
645 #define D0_SAMPLE_TYPE_2D     (0x0 << 22)
646 #define D0_SAMPLE_TYPE_CUBE   (0x1 << 22)
647 #define D0_SAMPLE_TYPE_VOLUME (0x2 << 22)
648 #define D0_SAMPLE_TYPE_MASK   (0x3 << 22)
649 
650 #define D0_TYPE_SHIFT 19
651 /* Allow: T, S */
652 #define D0_NR_SHIFT 14
653 /* Allow T: 0..10, S: 0..15 */
654 #define D0_CHANNEL_X    (1 << 10)
655 #define D0_CHANNEL_Y    (2 << 10)
656 #define D0_CHANNEL_Z    (4 << 10)
657 #define D0_CHANNEL_W    (8 << 10)
658 #define D0_CHANNEL_ALL  (0xf << 10)
659 #define D0_CHANNEL_NONE (0 << 10)
660 
661 #define D0_CHANNEL_XY  (D0_CHANNEL_X | D0_CHANNEL_Y)
662 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY | D0_CHANNEL_Z)
663 
664 /* I915 Errata: Do not allow (xz), (xw), (xzw) combinations for diffuse
665  * or specular declarations.
666  *
667  * For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw)
668  *
669  * Must be zero for S (sampler) dcls
670  */
671 #define D1_MBZ 0
672 #define D2_MBZ 0
673 
674 /* p207 */
675 #define _3DSTATE_MAP_STATE (CMD_3D | (0x1d << 24) | (0x0 << 16))
676 
677 #define MS1_MAPMASK_SHIFT 0
678 #define MS1_MAPMASK_MASK  (0x8fff << 0)
679 
680 #define MS2_UNTRUSTED_SURFACE    (1 << 31)
681 #define MS2_ADDRESS_MASK         0xfffffffc
682 #define MS2_VERTICAL_LINE_STRIDE (1 << 1)
683 #define MS2_VERTICAL_OFFSET      (1 << 1)
684 
685 #define MS3_HEIGHT_SHIFT         21
686 #define MS3_WIDTH_SHIFT          10
687 #define MS3_PALETTE_SELECT       (1 << 9)
688 #define MS3_MAPSURF_FORMAT_SHIFT 7
689 #define MS3_MAPSURF_FORMAT_MASK  (0x7 << 7)
690 #define MAPSURF_8BIT             (1 << 7)
691 #define MAPSURF_16BIT            (2 << 7)
692 #define MAPSURF_32BIT            (3 << 7)
693 #define MAPSURF_422              (5 << 7)
694 #define MAPSURF_COMPRESSED       (6 << 7)
695 #define MAPSURF_4BIT_INDEXED     (7 << 7)
696 #define MS3_MT_FORMAT_MASK       (0x7 << 3)
697 #define MS3_MT_FORMAT_SHIFT      3
698 #define MT_4BIT_P4               (7 << 3) /* SURFACE_4BIT_INDEXED */
699 #define MT_8BIT_I8               (0 << 3) /* SURFACE_8BIT */
700 #define MT_8BIT_L8               (1 << 3)
701 #define MT_8BIT_A4P4             (2 << 3)
702 #define MT_8BIT_P4A4             (3 << 3)
703 #define MT_8BIT_A8               (4 << 3)
704 #define MT_8BIT_MONO8            (5 << 3)
705 #define MT_16BIT_RGB565          (0 << 3) /* SURFACE_16BIT */
706 #define MT_16BIT_ARGB1555        (1 << 3)
707 #define MT_16BIT_ARGB4444        (2 << 3)
708 #define MT_16BIT_AY88            (3 << 3)
709 #define MT_16BIT_88DVDU          (5 << 3)
710 #define MT_16BIT_BUMP_655LDVDU   (6 << 3)
711 #define MT_16BIT_I16             (7 << 3)
712 #define MT_16BIT_L16             (8 << 3)
713 #define MT_16BIT_A16             (9 << 3)
714 #define MT_32BIT_ARGB8888        (0 << 3) /* SURFACE_32BIT */
715 #define MT_32BIT_ABGR8888        (1 << 3)
716 #define MT_32BIT_XRGB8888        (2 << 3)
717 #define MT_32BIT_XBGR8888        (3 << 3)
718 #define MT_32BIT_QWVU8888        (4 << 3)
719 #define MT_32BIT_AXVU8888        (5 << 3)
720 #define MT_32BIT_LXVU8888        (6 << 3)
721 #define MT_32BIT_XLVU8888        (7 << 3)
722 #define MT_32BIT_ARGB2101010     (8 << 3)
723 #define MT_32BIT_ABGR2101010     (9 << 3)
724 #define MT_32BIT_AWVU2101010     (0xA << 3)
725 #define MT_32BIT_GR1616          (0xB << 3)
726 #define MT_32BIT_VU1616          (0xC << 3)
727 #define MT_32BIT_xI824           (0xD << 3)
728 #define MT_32BIT_xL824           (0xE << 3)
729 #define MT_32BIT_xA824           (0xF << 3)
730 #define MT_422_YCRCB_SWAPY       (0 << 3) /* SURFACE_422 */
731 #define MT_422_YCRCB_NORMAL      (1 << 3)
732 #define MT_422_YCRCB_SWAPUV      (2 << 3)
733 #define MT_422_YCRCB_SWAPUVY     (3 << 3)
734 #define MT_COMPRESS_DXT1         (0 << 3) /* SURFACE_COMPRESSED */
735 #define MT_COMPRESS_DXT2_3       (1 << 3)
736 #define MT_COMPRESS_DXT4_5       (2 << 3)
737 #define MT_COMPRESS_FXT1         (3 << 3)
738 #define MT_COMPRESS_DXT1_RGB     (4 << 3)
739 #define MS3_USE_FENCE_REGS       (1 << 2)
740 #define MS3_TILED_SURFACE        (1 << 1)
741 #define MS3_TILE_WALK_Y          (1 << 0)
742 
743 #define MS4_PITCH_SHIFT          21
744 #define MS4_CUBE_FACE_ENA_NEGX   (1 << 20)
745 #define MS4_CUBE_FACE_ENA_POSX   (1 << 19)
746 #define MS4_CUBE_FACE_ENA_NEGY   (1 << 18)
747 #define MS4_CUBE_FACE_ENA_POSY   (1 << 17)
748 #define MS4_CUBE_FACE_ENA_NEGZ   (1 << 16)
749 #define MS4_CUBE_FACE_ENA_POSZ   (1 << 15)
750 #define MS4_CUBE_FACE_ENA_MASK   (0x3f << 15)
751 #define MS4_MAX_LOD_SHIFT        9
752 #define MS4_MAX_LOD_MASK         (0x3f << 9)
753 #define MS4_MIP_LAYOUT_LEGACY    (0 << 8)
754 #define MS4_MIP_LAYOUT_BELOW_LPT (0 << 8)
755 #define MS4_MIP_LAYOUT_RIGHT_LPT (1 << 8)
756 #define MS4_VOLUME_DEPTH_SHIFT   0
757 #define MS4_VOLUME_DEPTH_MASK    (0xff << 0)
758 
759 /* p244 */
760 #define _3DSTATE_SAMPLER_STATE (CMD_3D | (0x1d << 24) | (0x1 << 16))
761 
762 #define SS1_MAPMASK_SHIFT 0
763 #define SS1_MAPMASK_MASK  (0x8fff << 0)
764 
765 #define SS2_REVERSE_GAMMA_ENABLE    (1 << 31)
766 #define SS2_PACKED_TO_PLANAR_ENABLE (1 << 30)
767 #define SS2_COLORSPACE_CONVERSION   (1 << 29)
768 #define SS2_CHROMAKEY_SHIFT         27
769 #define SS2_BASE_MIP_LEVEL_SHIFT    22
770 #define SS2_BASE_MIP_LEVEL_MASK     (0x1f << 22)
771 #define SS2_MIP_FILTER_SHIFT        20
772 #define SS2_MIP_FILTER_MASK         (0x3 << 20)
773 #define MIPFILTER_NONE              0
774 #define MIPFILTER_NEAREST           1
775 #define MIPFILTER_LINEAR            3
776 #define SS2_MAG_FILTER_SHIFT        17
777 #define SS2_MAG_FILTER_MASK         (0x7 << 17)
778 #define FILTER_NEAREST              0
779 #define FILTER_LINEAR               1
780 #define FILTER_ANISOTROPIC          2
781 #define FILTER_4X4_1                3
782 #define FILTER_4X4_2                4
783 #define FILTER_4X4_FLAT             5
784 #define FILTER_6X5_MONO             6 /* XXX - check */
785 #define SS2_MIN_FILTER_SHIFT        14
786 #define SS2_MIN_FILTER_MASK         (0x7 << 14)
787 #define SS2_LOD_BIAS_SHIFT          5
788 #define SS2_LOD_BIAS_ONE            (0x10 << 5)
789 #define SS2_LOD_BIAS_MASK           (0x1ff << 5)
790 /* Shadow requires:
791  *  MT_X8{I,L,A}24 or MT_{I,L,A}16 texture format
792  *  FILTER_4X4_x  MIN and MAG filters
793  */
794 #define SS2_SHADOW_ENABLE     (1 << 4)
795 #define SS2_MAX_ANISO_MASK    (1 << 3)
796 #define SS2_MAX_ANISO_2       (0 << 3)
797 #define SS2_MAX_ANISO_4       (1 << 3)
798 #define SS2_SHADOW_FUNC_SHIFT 0
799 #define SS2_SHADOW_FUNC_MASK  (0x7 << 0)
800 /* SS2_SHADOW_FUNC values: see COMPAREFUNC_* */
801 
802 #define SS3_MIN_LOD_SHIFT          24
803 #define SS3_MIN_LOD_ONE            (0x10 << 24)
804 #define SS3_MIN_LOD_MASK           (0xff << 24)
805 #define SS3_KILL_PIXEL_ENABLE      (1 << 17)
806 #define SS3_TCX_ADDR_MODE_SHIFT    12
807 #define SS3_TCX_ADDR_MODE_MASK     (0x7 << 12)
808 #define TEXCOORDMODE_WRAP          0
809 #define TEXCOORDMODE_MIRROR        1
810 #define TEXCOORDMODE_CLAMP_EDGE    2
811 #define TEXCOORDMODE_CUBE          3
812 #define TEXCOORDMODE_CLAMP_BORDER  4
813 #define TEXCOORDMODE_MIRROR_ONCE   5
814 #define SS3_TCY_ADDR_MODE_SHIFT    9
815 #define SS3_TCY_ADDR_MODE_MASK     (0x7 << 9)
816 #define SS3_TCZ_ADDR_MODE_SHIFT    6
817 #define SS3_TCZ_ADDR_MODE_MASK     (0x7 << 6)
818 #define SS3_NORMALIZED_COORDS      (1 << 5)
819 #define SS3_TEXTUREMAP_INDEX_SHIFT 1
820 #define SS3_TEXTUREMAP_INDEX_MASK  (0xf << 1)
821 #define SS3_DEINTERLACER_ENABLE    (1 << 0)
822 
823 #define SS4_BORDER_COLOR_MASK (~0)
824 
825 /* 3DSTATE_SPAN_STIPPLE, p258
826  */
827 #define _3DSTATE_STIPPLE ((0x3 << 29) | (0x1d << 24) | (0x83 << 16))
828 #define ST1_ENABLE       (1 << 16)
829 #define ST1_MASK         (0xffff)
830 
831 #define _3DSTATE_DEFAULT_Z        ((0x3 << 29) | (0x1d << 24) | (0x98 << 16))
832 #define _3DSTATE_DEFAULT_DIFFUSE  ((0x3 << 29) | (0x1d << 24) | (0x99 << 16))
833 #define _3DSTATE_DEFAULT_SPECULAR ((0x3 << 29) | (0x1d << 24) | (0x9a << 16))
834 
835 #define MI_FLUSH                   ((0 << 29) | (4 << 23))
836 #define FLUSH_MAP_CACHE            (1 << 0)
837 #define INHIBIT_FLUSH_RENDER_CACHE (1 << 2)
838 #define MI_NOOP                    0
839 
840 #define CMD_3D (0x3 << 29)
841 
842 #define _3DPRIMITIVE             ((0x3 << 29) | (0x1f << 24))
843 #define PRIM_INDIRECT            (1 << 23)
844 #define PRIM_INLINE              (0 << 23)
845 #define PRIM_INDIRECT_SEQUENTIAL (0 << 17)
846 #define PRIM_INDIRECT_ELTS       (1 << 17)
847 
848 #define PRIM3D_TRILIST        (0x0 << 18)
849 #define PRIM3D_TRISTRIP       (0x1 << 18)
850 #define PRIM3D_TRISTRIP_RVRSE (0x2 << 18)
851 #define PRIM3D_TRIFAN         (0x3 << 18)
852 #define PRIM3D_POLY           (0x4 << 18)
853 #define PRIM3D_LINELIST       (0x5 << 18)
854 #define PRIM3D_LINESTRIP      (0x6 << 18)
855 #define PRIM3D_RECTLIST       (0x7 << 18)
856 #define PRIM3D_POINTLIST      (0x8 << 18)
857 #define PRIM3D_DIB            (0x9 << 18)
858 #define PRIM3D_MASK           (0x1f << 18)
859 
860 #define I915PACKCOLOR4444(r, g, b, a)                                          \
861    ((((a)&0xf0) << 8) | (((r)&0xf0) << 4) | ((g)&0xf0) | ((b) >> 4))
862 
863 #define I915PACKCOLOR1555(r, g, b, a)                                          \
864    ((((r)&0xf8) << 7) | (((g)&0xf8) << 2) | (((b)&0xf8) >> 3) |                \
865     ((a) ? 0x8000 : 0))
866 
867 #define I915PACKCOLOR565(r, g, b)                                              \
868    ((((r)&0xf8) << 8) | (((g)&0xfc) << 3) | (((b)&0xf8) >> 3))
869 
870 #define I915PACKCOLOR8888(r, g, b, a) ((a << 24) | (r << 16) | (g << 8) | b)
871 
872 #define BR00_BITBLT_CLIENT   0x40000000
873 #define BR00_OP_COLOR_BLT    0x10000000
874 #define BR00_OP_SRC_COPY_BLT 0x10C00000
875 #define BR13_SOLID_PATTERN   0x80000000
876 
877 #define XY_COLOR_BLT_CMD         ((2 << 29) | (0x50 << 22) | 0x4)
878 #define XY_COLOR_BLT_WRITE_ALPHA (1 << 21)
879 #define XY_COLOR_BLT_WRITE_RGB   (1 << 20)
880 
881 #define XY_SRC_COPY_BLT_CMD         ((2 << 29) | (0x53 << 22) | 6)
882 #define XY_SRC_COPY_BLT_WRITE_ALPHA (1 << 21)
883 #define XY_SRC_COPY_BLT_WRITE_RGB   (1 << 20)
884 
885 #define MI_WAIT_FOR_EVENT        ((0x3 << 23))
886 #define MI_WAIT_FOR_PLANE_B_FLIP (1 << 6)
887 #define MI_WAIT_FOR_PLANE_A_FLIP (1 << 2)
888 
889 #define MI_BATCH_BUFFER       (0x30 << 23)
890 #define MI_BATCH_BUFFER_START (0x31 << 23)
891 #define MI_BATCH_BUFFER_END   (0xa << 23)
892 
893 #define COMPAREFUNC_ALWAYS   0
894 #define COMPAREFUNC_NEVER    0x1
895 #define COMPAREFUNC_LESS     0x2
896 #define COMPAREFUNC_EQUAL    0x3
897 #define COMPAREFUNC_LEQUAL   0x4
898 #define COMPAREFUNC_GREATER  0x5
899 #define COMPAREFUNC_NOTEQUAL 0x6
900 #define COMPAREFUNC_GEQUAL   0x7
901 
902 #define STENCILOP_KEEP    0
903 #define STENCILOP_ZERO    0x1
904 #define STENCILOP_REPLACE 0x2
905 #define STENCILOP_INCRSAT 0x3
906 #define STENCILOP_DECRSAT 0x4
907 #define STENCILOP_INCR    0x5
908 #define STENCILOP_DECR    0x6
909 #define STENCILOP_INVERT  0x7
910 
911 #define LOGICOP_CLEAR     0
912 #define LOGICOP_NOR       0x1
913 #define LOGICOP_AND_INV   0x2
914 #define LOGICOP_COPY_INV  0x3
915 #define LOGICOP_AND_RVRSE 0x4
916 #define LOGICOP_INV       0x5
917 #define LOGICOP_XOR       0x6
918 #define LOGICOP_NAND      0x7
919 #define LOGICOP_AND       0x8
920 #define LOGICOP_EQUIV     0x9
921 #define LOGICOP_NOOP      0xa
922 #define LOGICOP_OR_INV    0xb
923 #define LOGICOP_COPY      0xc
924 #define LOGICOP_OR_RVRSE  0xd
925 #define LOGICOP_OR        0xe
926 #define LOGICOP_SET       0xf
927 
928 #define BLENDFACT_ZERO               0x01
929 #define BLENDFACT_ONE                0x02
930 #define BLENDFACT_SRC_COLR           0x03
931 #define BLENDFACT_INV_SRC_COLR       0x04
932 #define BLENDFACT_SRC_ALPHA          0x05
933 #define BLENDFACT_INV_SRC_ALPHA      0x06
934 #define BLENDFACT_DST_ALPHA          0x07
935 #define BLENDFACT_INV_DST_ALPHA      0x08
936 #define BLENDFACT_DST_COLR           0x09
937 #define BLENDFACT_INV_DST_COLR       0x0a
938 #define BLENDFACT_SRC_ALPHA_SATURATE 0x0b
939 #define BLENDFACT_CONST_COLOR        0x0c
940 #define BLENDFACT_INV_CONST_COLOR    0x0d
941 #define BLENDFACT_CONST_ALPHA        0x0e
942 #define BLENDFACT_INV_CONST_ALPHA    0x0f
943 #define BLENDFACT_MASK               0x0f
944 
945 #define PCI_CHIP_I915_G     0x2582
946 #define PCI_CHIP_I915_GM    0x2592
947 #define PCI_CHIP_I945_G     0x2772
948 #define PCI_CHIP_I945_GM    0x27A2
949 #define PCI_CHIP_I945_GME   0x27AE
950 #define PCI_CHIP_G33_G      0x29C2
951 #define PCI_CHIP_Q35_G      0x29B2
952 #define PCI_CHIP_Q33_G      0x29D2
953 #define PCI_CHIP_PINEVIEW_G 0xA001
954 #define PCI_CHIP_PINEVIEW_M 0xA011
955 
956 #endif
957