| /third_party/ffmpeg/libavcodec/ |
| D | simple_idct_template.c | 39 #undef W5
54 #define W5 12873 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 macro
72 #define W5 12873 // 51491 macro
95 #define W5 25746 macro
173 b2 = MUL(W5, row[1]);
176 MAC(b3, -W5, row[3]);
188 MAC(b0, W5, row[5]);
192 MAC(b1, -W5, row[7]);
224 b2 = MUL(W5, col[8*1]); \
230 MAC(b3, -W5, col[8*3]); \
[all …]
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| D | wmv2dsp.c | 31 #define W5 1609 /* 2048*sqrt (2)*cos (5*pi/16) */ macro
43 a5 = W5 * b[5] + W3 * b[3]; in wmv2_idct_row()
44 a3 = W3 * b[5] - W5 * b[3]; in wmv2_idct_row()
73 a5 = (W5 * b[8 * 5] + W3 * b[8 * 3] + 4) >> 3; in wmv2_idct_col()
74 a3 = (W3 * b[8 * 5] - W5 * b[8 * 3] + 4) >> 3; in wmv2_idct_col()
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| /third_party/ffmpeg/libavcodec/alpha/ |
| D | simple_idct_alpha.c | 39 #define W5 12873 macro
105 b2 = W5 * t; in idct_row()
120 b3 -= W5 * t; in idct_row()
127 b0 += W5 * t; in idct_row()
137 b1 -= W5 * t; in idct_row()
189 b2 = W5 * col[8 * 1]; in idct_col()
202 b3 -= W5 * col[8 * 3]; in idct_col()
206 b0 += W5 * col[8 * 5]; in idct_col()
214 b1 -= W5 * col[8 * 7]; in idct_col()
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| /third_party/ffmpeg/libavcodec/mips/ |
| D | simple_idct_mmi.c | 35 #define W5 12873 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 macro
45 W1, W3, W5, W7,
47 W3, -W7, -W1, -W5,
49 W5, -W1, W7, W3,
51 W7, -W5, W3, -W1,
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| D | wmv2dsp_mmi.c | 33 #define W5 1609 /* 2048*sqrt (2)*cos (5*pi/16) */ macro
46 a3 = W3 * b[5] - W5 * b[3]; in wmv2_idct_row_mmi()
48 a5 = W5 * b[5] + W3 * b[3]; in wmv2_idct_row_mmi()
76 a3 = (W3 * b[40] - W5 * b[24] + 4) >> 3; in wmv2_idct_col_mmi()
78 a5 = (W5 * b[40] + W3 * b[24] + 4) >> 3; in wmv2_idct_col_mmi()
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| /third_party/ffmpeg/libavcodec/arm/ |
| D | simple_idct_arm.S | 33 #define W5 12873 macro
94 @@ MUL16(b2, W5, row[1]);
99 @@ MAC16(b3, -W5, row[3]);
104 ldr r10, =W5 @ R10=W5
107 …mul r5, r10, r7 @ R5=W5*ROWr16[1]=b2 (ROWr16[1] must be the second arg, to have the possi…
116 …mlane r7, r10, r2, r7 @ R7-=W5*ROWr16[3]=b3 (ROWr16[3] must be the second arg, to have the poss…
119 @@ R5=b2, R6=ROWr16[0], R7=b3, R8=W1, R9=W3, R10=W5, R11=W7,
127 @@ R5=b2, R6=ROWr16[0], R7=b3, R8=W1, R9=W3, R10=W5, R11=W7,
129 @@ MAC16(b0, W5, row[5]);
136 @@ MAC16(b1, -W5, row[7]);
[all …]
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| D | simple_idct_armv6.S | 30 #define W5 12873 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */ macro
41 #define W57 (W5 | (W7 << 16))
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| D | simple_idct_neon.S | 32 #define W5 12873 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 macro
247 .short W1, W2, W3, W4, W5, W6, W7, W4c
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| D | simple_idct_armv5te.S | 30 #define W5 12873 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */ macro
38 #define W57 (W5 | (W7 << 16))
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFCallingConv.td | 37 CCIfType<[i32], CCAssignToRegWithShadow<[W1, W2, W3, W4, W5],
42 [W1, W2, W3, W4, W5]>>,
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| /third_party/node/ |
| D | .flake8 | 3 ignore=E1,E2,E3,E4,E5,E7,W5,W6
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64CallingConvention.td | 92 CCIfType<[i32], CCAssignToRegWithShadow<[W0, W1, W2, W3, W4, W5, W6, W7],
102 [W0, W1, W2, W3, W4, W5, W6, W7]>>,
141 CCIfType<[i32], CCAssignToRegWithShadow<[W0, W1, W2, W3, W4, W5, W6, W7],
144 [W0, W1, W2, W3, W4, W5, W6, W7]>>,
209 CCIfType<[i32], CCAssignToRegWithShadow<[W0, W1, W2, W3, W4, W5, W6, W7],
214 [W0, W1, W2, W3, W4, W5, W6]>>>,
219 [W0, W1, W2, W3, W4, W5, W6, W7]>>,
310 CCIfType<[i32], CCAssignToRegWithShadow<[W0, W1, W2, W3, W4, W5, W6, W7],
313 [W0, W1, W2, W3, W4, W5, W6, W7]>>,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonCallingConv.td | 89 CCAssignToReg<[W0,W1,W2,W3,W4,W5,W6,W7]>>>,
103 CCAssignToReg<[W0,W1,W2,W3,W4,W5,W6,W7]>>>,
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| D | HexagonRegisterInfo.cpp | 74 W0, W1, W2, W3, W4, W5, W6, W7, W8, W9, W10, W11, W12, W13, W14, W15, 0 in getCallerSavedRegs()
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| D | HexagonRegisterInfo.td | 196 def W5 : Rd<10, "v11:10", [V10, V11]>, DwarfRegNum<[109]>;
213 def VQ2 : Rd< 8, "v11:8", [W4, W5]>, DwarfRegNum<[254]>;
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| /third_party/ffmpeg/libavcodec/x86/ |
| D | simple_idct10_template.asm | 160 ; b2 = MUL(W5, row[1]);
163 ; MAC(b3, -W5, row[3]);
179 ; MAC(b0, W5, row[5]);
182 ; MAC(b1, -W5, row[7]);
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| D | simple_idct10.asm | 54 %define W5sh2 12873 ; W5 = 51491 = 12873<<2 - 1
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenCallingConv.inc | 216 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
258 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
460 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
477 AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6
502 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
1055 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
1071 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
1196 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
1212 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
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| /third_party/typescript/tests/cases/compiler/ |
| D | constEnums.ts | 37 W5 = Enum1[`V`], enumerator
|
| /third_party/typescript/tests/baselines/reference/ |
| D | constEnums.js | 38 W5 = Enum1[`V`],
|
| D | constEnums.types | 176 W5 = Enum1[`V`],
177 >W5 : Enum1
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| D | constEnums.symbols | 132 W5 = Enum1[`V`],
133 >W5 : Symbol(Enum1.W5, Decl(constEnums.ts, 35, 20))
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/Disassembler/ |
| D | BPFDisassembler.cpp | 112 BPF::W0, BPF::W1, BPF::W2, BPF::W3, BPF::W4, BPF::W5,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 36 case AArch64::X5: return AArch64::W5; in getWRegFromXReg()
76 case AArch64::W5: return AArch64::X5; in getXRegFromWReg()
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| /third_party/ffmpeg/libavcodec/ppc/ |
| D | fdctdsp.c | 53 #define W5 (M_SQRT2 * (C1 + C3 - C5 + C7)) macro
63 { W4, W5, W6, W7 },
|