| /third_party/libwebsockets/plugins/ssh-base/crypto/ |
| D | chacha.c | 52 #define XOR(v,w) ((v) ^ (w)) macro
57 a = PLUS(a,b); d = ROTATE(XOR(d,a),16); \
58 c = PLUS(c,d); b = ROTATE(XOR(b,c),12); \
59 a = PLUS(a,b); d = ROTATE(XOR(d,a), 8); \
60 c = PLUS(c,d); b = ROTATE(XOR(b,c), 7);
177 x0 = XOR(x0,U8TO32_LITTLE(m + 0)); in chacha_encrypt_bytes()
178 x1 = XOR(x1,U8TO32_LITTLE(m + 4)); in chacha_encrypt_bytes()
179 x2 = XOR(x2,U8TO32_LITTLE(m + 8)); in chacha_encrypt_bytes()
180 x3 = XOR(x3,U8TO32_LITTLE(m + 12)); in chacha_encrypt_bytes()
181 x4 = XOR(x4,U8TO32_LITTLE(m + 16)); in chacha_encrypt_bytes()
[all …]
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| /third_party/mesa3d/src/intel/compiler/ |
| D | test_fs_scoreboard.cpp | 480 bld.XOR( x, g[1], g[2]); in TEST_F()
511 bld.XOR( x, g[1], g[2]); in TEST_F()
512 bld.XOR(g[3], g[1], g[2]); in TEST_F()
513 bld.XOR(g[4], g[1], g[2]); in TEST_F()
514 bld.XOR(g[5], g[1], g[2]); in TEST_F()
547 bld.XOR( x, g[1], g[2]); in TEST_F()
552 bld.XOR(g[3], g[1], g[2]); in TEST_F()
553 bld.XOR(g[4], g[1], g[2]); in TEST_F()
554 bld.XOR(g[5], g[1], g[2]); in TEST_F()
555 bld.XOR(g[6], g[1], g[2]); in TEST_F()
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiAluCode.h | 29 XOR = 0x06, enumerator
90 case XOR: in lanaiAluCodeToString()
111 .Case("xor", XOR) in stringToLanaiAluCode()
132 case ISD::XOR: in isdToLanaiAluCode()
133 return AluCode::XOR; in isdToLanaiAluCode()
|
| /third_party/openGLES/extensions/NV/ |
| D | NV_shader_atomic_int64.txt | 135 "XOR", "ADD", "EXCH", and "CSWAP". "U64" should be allowed a s storage
136 modifier for the atomic operations "MIN", "MAX", "AND", "OR", and "XOR".
145 "MAX", "AND", "OR", "XOR", "ADD", "EXCH", and "CSWAP", and the "U64"
147 and "XOR".
162 XOR U32, S32, U64, S64 compute bit-wise XOR
|
| /third_party/skia/third_party/externals/opengl-registry/extensions/NV/ |
| D | NV_shader_atomic_int64.txt | 135 "XOR", "ADD", "EXCH", and "CSWAP". "U64" should be allowed a s storage
136 modifier for the atomic operations "MIN", "MAX", "AND", "OR", and "XOR".
145 "MAX", "AND", "OR", "XOR", "ADD", "EXCH", and "CSWAP", and the "U64"
147 and "XOR".
162 XOR U32, S32, U64, S64 compute bit-wise XOR
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsCondMov.td | 201 defm : MovzPats1<GPR32, GPR32, MOVZ_I_I, XOR>, INSN_MIPS4_32_NOT_32R6_64R6;
210 defm : MovzPats1<GPR32, GPR64, MOVZ_I_I64, XOR>,
223 defm : MovnPats<GPR32, GPR32, MOVN_I_I, XOR>, INSN_MIPS4_32_NOT_32R6_64R6;
225 defm : MovnPats<GPR32, GPR64, MOVN_I_I64, XOR>, INSN_MIPS4_32_NOT_32R6_64R6,
234 defm : MovzPats1<GPR32, FGR32, MOVZ_I_S, XOR>, INSN_MIPS4_32_NOT_32R6_64R6;
235 defm : MovnPats<GPR32, FGR32, MOVN_I_S, XOR>, INSN_MIPS4_32_NOT_32R6_64R6;
246 defm : MovzPats1<GPR32, AFGR64, MOVZ_I_D32, XOR>, INSN_MIPS4_32_NOT_32R6_64R6,
248 defm : MovnPats<GPR32, AFGR64, MOVN_I_D32, XOR>, INSN_MIPS4_32_NOT_32R6_64R6,
255 defm : MovzPats1<GPR32, FGR64, MOVZ_I_D64, XOR>, INSN_MIPS4_32_NOT_32R6_64R6,
259 defm : MovnPats<GPR32, FGR64, MOVN_I_D64, XOR>, INSN_MIPS4_32_NOT_32R6_64R6,
|
| /third_party/vk-gl-cts/external/vulkancts/data/vulkan/amber/texture/multisample/atomic/ |
| D | storage_image_r32i.amber | 57 // XOR with two patterns in the second highest byte. Should set this
58 // byte to 0xc. The order of XOR operations don't matter.
|
| D | storage_image_r32ui.amber | 57 // XOR with two patterns in the second highest byte. Should set this
58 // byte to 0xc. The order of XOR operations don't matter.
|
| /third_party/skia/third_party/externals/spirv-cross/shaders-no-opt/comp/ |
| D | specialization-constant-evaluation.comp | 46 const uint XOR = IADD ^ IADD; // 0
47 const uint NOT = ~XOR; // UINT_MAX
84 DUMMY_SSBO(Xor, 24, XOR + 1);
|
| /third_party/selinux/checkpolicy/ |
| D | policy_scan.l | 186 XOR { return(XOR); }
299 "^" { return (XOR); }
|
| /third_party/skia/platform_tools/android/apps/AndroidKit/src/main/java/org/skia/androidkit/ |
| D | BlendMode.java | 22 XOR(11), enumConstant
|
| /third_party/flutter/skia/modules/pathkit/tests/ |
| D | pathops.spec.js | 84 'kXOR_SkPathOp': PathKit.PathOp.XOR,
85 'kXOR_PathOp': PathKit.PathOp.XOR,
|
| /third_party/skia/modules/pathkit/tests/ |
| D | pathops.spec.js | 84 'kXOR_SkPathOp': PathKit.PathOp.XOR,
85 'kXOR_PathOp': PathKit.PathOp.XOR,
|
| /third_party/skia/third_party/externals/spirv-cross/reference/shaders-no-opt/comp/ |
| D | specialization-constant-evaluation.comp | 83 const uint XOR = (IADD ^ IADD);
84 const uint _215 = (XOR + 1u);
85 const uint NOT = (~XOR);
|
| /third_party/pcre2/pcre2/src/sljit/ |
| D | sljitNativeMIPS_32.c | 182 FAIL_IF(push_inst(compiler, XOR | S(src1) | T(src2) | DA(EQUAL_FLAG), EQUAL_FLAG)); in emit_single_op()
199 FAIL_IF(push_inst(compiler, XOR | S(TMP_REG1) | TA(EQUAL_FLAG) | DA(EQUAL_FLAG), EQUAL_FLAG)); in emit_single_op()
200 FAIL_IF(push_inst(compiler, XOR | S(dst) | TA(EQUAL_FLAG) | DA(OTHER_FLAG), OTHER_FLAG)); in emit_single_op()
318 FAIL_IF(push_inst(compiler, XOR | S(src1) | T(src2) | DA(EQUAL_FLAG), EQUAL_FLAG)); in emit_single_op()
332 FAIL_IF(push_inst(compiler, XOR | S(TMP_REG1) | TA(EQUAL_FLAG) | DA(EQUAL_FLAG), EQUAL_FLAG)); in emit_single_op()
333 FAIL_IF(push_inst(compiler, XOR | S(dst) | TA(EQUAL_FLAG) | DA(OTHER_FLAG), OTHER_FLAG)); in emit_single_op()
398 EMIT_LOGICAL(XORI, XOR); in emit_single_op()
|
| D | sljitNativeMIPS_64.c | 295 FAIL_IF(push_inst(compiler, XOR | S(src1) | T(src2) | DA(EQUAL_FLAG), EQUAL_FLAG)); in emit_single_op()
312 FAIL_IF(push_inst(compiler, XOR | S(TMP_REG1) | TA(EQUAL_FLAG) | DA(EQUAL_FLAG), EQUAL_FLAG)); in emit_single_op()
313 FAIL_IF(push_inst(compiler, XOR | S(dst) | TA(EQUAL_FLAG) | DA(OTHER_FLAG), OTHER_FLAG)); in emit_single_op()
431 FAIL_IF(push_inst(compiler, XOR | S(src1) | T(src2) | DA(EQUAL_FLAG), EQUAL_FLAG)); in emit_single_op()
445 FAIL_IF(push_inst(compiler, XOR | S(TMP_REG1) | TA(EQUAL_FLAG) | DA(EQUAL_FLAG), EQUAL_FLAG)); in emit_single_op()
446 FAIL_IF(push_inst(compiler, XOR | S(dst) | TA(EQUAL_FLAG) | DA(OTHER_FLAG), OTHER_FLAG)); in emit_single_op()
516 EMIT_LOGICAL(XORI, XOR); in emit_single_op()
|
| /third_party/protobuf/php/tests/proto/ |
| D | test_reserved_enum_value_upper.proto | 69 XOR = 63; enumerator
|
| D | test_reserved_message_upper.proto | 68 message XOR {} message
|
| D | test_reserved_enum_upper.proto | 68 enum XOR { ZERO64 = 0; } enum
|
| /third_party/skia/third_party/externals/opengl-registry/extensions/ARB/ |
| D | ARB_shader_atomic_counter_ops.txt | 56 * Bitwise operators (AND, OR, XOR, etc.)
130 …tomic_uint c, | 1. sets the counter for c to the result of the bitwise XOR of |
197 * Bitwise operators (AND, OR, XOR, etc.)
|
| /third_party/openGLES/extensions/ARB/ |
| D | ARB_shader_atomic_counter_ops.txt | 66 * Bitwise operators (AND, OR, XOR, etc.)
140 …tomic_uint c, | 1. sets the counter for c to the result of the bitwise XOR of |
207 * Bitwise operators (AND, OR, XOR, etc.)
|
| /third_party/ltp/tools/sparse/sparse-src/ |
| D | opcode.def | 38 OPCODE(XOR, BADOP, BADOP, BADOP, BADOP, 2, OPF_TARGET|OPF_COMMU|OPF_ASSOC|OPF_BINOP)
39 OPCODE_RANGE(BINARY, ADD, XOR)
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXTargetTransformInfo.cpp | 130 case ISD::XOR: in getArithmeticInstrCost()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 2534 case ISD::XOR: in Select()
2542 return Opc == ISD::AND || Opc == ISD::OR || Opc == ISD::XOR; in isLogicOp()
2720 case ISD::XOR: NewOpc = PPC::XOR8; break; in computeLogicOpInGPR()
2921 SDValue(CurDAG->getMachineNode(PPC::XOR, dl, MVT::i32, LHS, RHS), 0); in get32BitZExtCompare()
2933 SDValue(CurDAG->getMachineNode(PPC::XOR, dl, MVT::i32, LHS, RHS), 0); in get32BitZExtCompare()
3097 SDValue(CurDAG->getMachineNode(PPC::XOR, dl, MVT::i32, LHS, RHS), 0); in get32BitSExtCompare()
3115 SDValue(CurDAG->getMachineNode(PPC::XOR, dl, MVT::i32, LHS, RHS), 0); in get32BitSExtCompare()
3655 case ISD::XOR: { in tryIntCompareInGPR()
4778 case ISD::XOR: { in Select()
5377 if (Op0.getOpcode() == ISD::XOR && CC == ISD::SETULT && in combineToCMPB()
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructions.td | 666 // ((x & z) | (y & (x | z))) -> BFI_INT (XOR x, y), z, y
667 multiclass SHA256MaPattern <Instruction BFI_INT, Instruction XOR, RegisterClass RC64> {
670 (BFI_INT (XOR i32:$x, i32:$y), i32:$z, i32:$y)
676 (BFI_INT (XOR (i32 (EXTRACT_SUBREG RC64:$x, sub0)),
680 (BFI_INT (XOR (i32 (EXTRACT_SUBREG RC64:$x, sub1)),
|