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Searched refs:bound_ctrl (Results 1 – 15 of 15) sorted by relevance

/third_party/mesa3d/src/amd/compiler/
Daco_lower_to_hw_instr.cpp201 unsigned bank_mask, bool bound_ctrl, Operand* identity = NULL) in emit_int64_dpp_op() argument
216 bound_ctrl); in emit_int64_dpp_op()
220 dpp_ctrl, row_mask, bank_mask, bound_ctrl); in emit_int64_dpp_op()
223 Operand(vcc, bld.lm), dpp_ctrl, row_mask, bank_mask, bound_ctrl); in emit_int64_dpp_op()
226 bound_ctrl); in emit_int64_dpp_op()
228 bound_ctrl); in emit_int64_dpp_op()
231 bound_ctrl); in emit_int64_dpp_op()
233 bound_ctrl); in emit_int64_dpp_op()
236 bound_ctrl); in emit_int64_dpp_op()
238 bound_ctrl); in emit_int64_dpp_op()
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Daco_opt_value_numbering.cpp183 aDPP.bound_ctrl == bDPP.bound_ctrl && aDPP.abs[0] == bDPP.abs[0] && in operator ()()
Daco_optimizer_postRA.cpp465 dpp->bound_ctrl = true; in try_combine_dpp()
Daco_print_ir.cpp607 if (dpp.bound_ctrl) in print_instr_format_specific()
Daco_assembler.cpp691 encoding |= dpp.bound_ctrl << 19; in emit_instruction()
Daco_optimizer.cpp2447 new_dpp->bound_ctrl = cmp_dpp.bound_ctrl; in combine_inverse_comparison()
4522 dpp->bound_ctrl = info.instr->dpp16().bound_ctrl; in select_instruction()
Daco_ir.h1448 bool bound_ctrl : 1; member
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DVOP1Instructions.td291 bank_mask:$bank_mask, bound_ctrl:$bound_ctrl, FI:$fi);
839 timm:$bound_ctrl)),
842 (as_i1imm $bound_ctrl))
847 timm:$bank_mask, timm:$bound_ctrl)),
850 (as_i1imm $bound_ctrl))
DVOP2Instructions.td294 bank_mask:$bank_mask, bound_ctrl:$bound_ctrl);
348 let AsmDPP = "$vdst, vcc, $src0, $src1 $dpp_ctrl$row_mask$bank_mask$bound_ctrl";
362 let AsmDPP = "$vdst, vcc, $src0, $src1, vcc $dpp_ctrl$row_mask$bank_mask$bound_ctrl";
382 bank_mask:$bank_mask, bound_ctrl:$bound_ctrl);
397 let AsmDPP = "$vdst, $src0, $src1, vcc $dpp_ctrl$row_mask$bank_mask$bound_ctrl";
418 bank_mask:$bank_mask, bound_ctrl:$bound_ctrl);
DSIInstrInfo.td1085 def bound_ctrl : NamedOperandBit<"BoundCtrl", NamedMatchClass<"BoundCtrl">>;
1749 bank_mask:$bank_mask, bound_ctrl:$bound_ctrl),
1755 bank_mask:$bank_mask, bound_ctrl:$bound_ctrl)
1760 bank_mask:$bank_mask, bound_ctrl:$bound_ctrl)
1769 bank_mask:$bank_mask, bound_ctrl:$bound_ctrl)
1775 bound_ctrl:$bound_ctrl)
1970 string ret = dst#args#" $dpp_ctrl$row_mask$bank_mask$bound_ctrl";
DGCNDPPCombine.cpp377 auto *BCZOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::bound_ctrl); in combineDPPMov()
DVOPInstructions.td577 bits<1> bound_ctrl;
585 let Inst{51} = bound_ctrl;
DSIInstructions.td1877 timm:$bound_ctrl)),
1880 (as_i1imm $bound_ctrl))
1885 timm:$bank_mask, timm:$bound_ctrl)),
1888 (as_i1imm $bound_ctrl))
/third_party/mesa3d/src/amd/llvm/
Dac_llvm_build.c3284 bool bound_ctrl) in _ac_build_dpp() argument
3296 LLVMConstInt(ctx->i1, bound_ctrl, 0)}, in _ac_build_dpp()
3304 bool bound_ctrl) in ac_build_dpp() argument
3321 _ac_build_dpp(ctx, old, src, dpp_ctrl, row_mask, bank_mask, bound_ctrl); in ac_build_dpp()
3326 ret = _ac_build_dpp(ctx, old, src, dpp_ctrl, row_mask, bank_mask, bound_ctrl); in ac_build_dpp()
3332 uint64_t sel, bool exchange_rows, bool bound_ctrl) in _ac_build_permlane16() argument
3345 bound_ctrl ? ctx->i1true : ctx->i1false, in _ac_build_permlane16()
3356 bool exchange_rows, bool bound_ctrl) in ac_build_permlane16() argument
3369 LLVMValueRef ret_comp = _ac_build_permlane16(ctx, src, sel, exchange_rows, bound_ctrl); in ac_build_permlane16()
3374 ret = _ac_build_permlane16(ctx, src, sel, exchange_rows, bound_ctrl); in ac_build_permlane16()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
DIntrinsicsAMDGPU.td1525 // llvm.amdgcn.mov.dpp.i32 <src> <dpp_ctrl> <row_mask> <bank_mask> <bound_ctrl>
1532 // llvm.amdgcn.update.dpp.i32 <old> <src> <dpp_ctrl> <row_mask> <bank_mask> <bound_ctrl>
1535 // v_mov_b32 <dest> <src> <dpp_ctrl> <row_mask> <bank_mask> <bound_ctrl>