| /third_party/mesa3d/src/intel/compiler/ |
| D | brw_disasm_info.h | 56 struct disasm_info { struct
69 struct disasm_info *disasm, const unsigned *block_latency); argument
71 struct disasm_info *
76 disasm_new_inst_group(struct disasm_info *disasm, unsigned offset);
79 disasm_annotate(struct disasm_info *disasm,
83 disasm_insert_error(struct disasm_info *disasm, unsigned offset,
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| D | brw_disasm_info.c | 35 struct disasm_info *disasm, const unsigned *block_latency) in dump_assembly()
106 struct disasm_info *
110 struct disasm_info *disasm = ralloc(NULL, struct disasm_info); in disasm_initialize()
120 disasm_new_inst_group(struct disasm_info *disasm, unsigned next_inst_offset) in disasm_new_inst_group()
129 disasm_annotate(struct disasm_info *disasm, in disasm_annotate()
172 disasm_insert_error(struct disasm_info *disasm, unsigned offset, in disasm_insert_error()
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| D | brw_fs_generator.cpp | 1779 struct disasm_info *disasm_info = disasm_initialize(p->isa, cfg); in generate_code() local
1852 disasm_annotate(disasm_info, inst, p->next_insn_offset); in generate_code()
2320 disasm_info->use_tail = true; in generate_code()
2430 disasm_info->use_tail = true; in generate_code()
2535 disasm_new_inst_group(disasm_info, p->next_insn_offset); in generate_code()
2554 disasm_info); in generate_code()
2557 brw_compact_instructions(p, start_offset, disasm_info); in generate_code()
2588 disasm_info, perf.block_latency); in generate_code()
2593 ralloc_free(disasm_info); in generate_code()
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| D | brw_vec4_generator.cpp | 1526 struct disasm_info *disasm_info = disasm_initialize(p->isa, cfg); in generate_code() local
1541 disasm_annotate(disasm_info, inst, p->next_insn_offset); in generate_code()
2207 disasm_new_inst_group(disasm_info, p->next_insn_offset); in generate_code()
2216 disasm_info); in generate_code()
2219 brw_compact_instructions(p, 0, disasm_info); in generate_code()
2243 disasm_info, perf.block_latency); in generate_code()
2248 ralloc_free(disasm_info); in generate_code()
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| D | brw_eu.h | 1873 struct disasm_info *disasm);
1886 struct disasm_info *disasm);
1889 struct disasm_info *disasm);
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| D | brw_eu_validate.c | 2296 struct disasm_info *disasm) in brw_validate_instruction()
2331 struct disasm_info *disasm) in brw_validate_instructions()
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| D | brw_eu_compact.c | 2481 struct disasm_info *disasm) in brw_compact_instructions()
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| D | test_eu_validate.cpp | 104 struct disasm_info *disasm = disasm_initialize(p->isa, NULL); in validate()
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| /third_party/mesa3d/src/intel/common/ |
| D | intel_disasm.c | 77 struct disasm_info *disasm_info = disasm_initialize(isa, NULL); in intel_disassemble() local
78 disasm_new_inst_group(disasm_info, start); in intel_disassemble()
79 disasm_new_inst_group(disasm_info, end); in intel_disassemble()
81 brw_validate_instructions(isa, assembly, start, end, disasm_info); in intel_disassemble()
88 &disasm_info->group_list) { in intel_disassemble()
108 ralloc_free(disasm_info); in intel_disassemble()
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| /third_party/mesa3d/src/intel/tools/ |
| D | i965_asm.c | 217 struct disasm_info *disasm_info; in main() local
328 disasm_info = disasm_initialize(p->isa, NULL); in main()
329 if (!disasm_info) { in main()
338 p->next_insn_offset, disasm_info); in main()
343 brw_compact_instructions(p, start_offset, disasm_info); in main()
359 ralloc_free(disasm_info); in main()
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| /third_party/mesa3d/src/freedreno/ir3/ |
| D | ir3_shader.c | 237 if (dbg_enabled || ir3_shader_override_path || v->disasm_info.write_disasm) { in assemble_variant()
247 if (v->disasm_info.write_disasm) { in assemble_variant()
260 v->disasm_info.disasm = ralloc_size(v, stream_size + 1); in assemble_variant()
261 memcpy(v->disasm_info.disasm, stream_data, stream_size); in assemble_variant()
262 v->disasm_info.disasm[stream_size] = 0; in assemble_variant()
405 v->disasm_info.write_disasm = write_disasm; in create_variant()
411 v->binning->disasm_info.write_disasm = write_disasm; in create_variant()
425 if (v->disasm_info.write_disasm) { in create_variant()
426 v->disasm_info.nir = nir_shader_as_str(shader->nir, v); in create_variant()
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| D | ir3_shader.h | 773 struct ir3_disasm_info disasm_info; member
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| /third_party/elfutils/src/ |
| D | objdump.c | 619 struct disasm_info struct
634 struct disasm_info *info = (struct disasm_info *) arg; in disasm_output() argument
710 struct disasm_info info; in show_disasm()
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| D | ChangeLog | 3147 (disasm_info): Add elements for color codes.
3149 (show_disasm): Set up disasm_info data for callback.
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| /third_party/mesa3d/src/freedreno/vulkan/ |
| D | tu_pipeline.c | 2505 .nir_final = ralloc_strdup(pipeline->executables_mem_ctx, variant->disasm_info.nir), in tu_append_executable()
2506 .disasm = ralloc_strdup(pipeline->executables_mem_ctx, variant->disasm_info.disasm), in tu_append_executable()
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| /third_party/mesa3d/docs/relnotes/ |
| D | 22.2.0.rst | 1312 - ir3: Allocate disasm_info under variant
|