| /third_party/mesa3d/src/gallium/drivers/r600/ |
| D | radeon_uvd.c | 238 unsigned width_in_mb, height_in_mb, image_size, dpb_size; in calc_dpb_size() local
292 dpb_size = image_size * max_references; in calc_dpb_size()
294 dpb_size += max_references * align(width_in_mb * height_in_mb * 192, alignment); in calc_dpb_size()
295 dpb_size += align(width_in_mb * height_in_mb * 32, alignment); in calc_dpb_size()
301 dpb_size = image_size * max_references; in calc_dpb_size()
304 dpb_size += width_in_mb * height_in_mb * max_references * 192; in calc_dpb_size()
306 dpb_size += width_in_mb * height_in_mb * 32; in calc_dpb_size()
317 dpb_size = image_size * max_references; in calc_dpb_size()
320 dpb_size += width_in_mb * height_in_mb * 128; in calc_dpb_size()
323 dpb_size += width_in_mb * 64; in calc_dpb_size()
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| D | radeon_uvd.h | 359 uint32_t dpb_size; member
371 uint32_t dpb_size; member
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| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| D | radeon_uvd.c | 336 unsigned width_in_mb, height_in_mb, image_size, dpb_size; in calc_dpb_size() local
390 dpb_size = image_size * max_references; in calc_dpb_size()
393 dpb_size += max_references * align(width_in_mb * height_in_mb * 192, alignment); in calc_dpb_size()
394 dpb_size += align(width_in_mb * height_in_mb * 32, alignment); in calc_dpb_size()
400 dpb_size = image_size * max_references; in calc_dpb_size()
404 dpb_size += width_in_mb * height_in_mb * max_references * 192; in calc_dpb_size()
406 dpb_size += width_in_mb * height_in_mb * 32; in calc_dpb_size()
421 dpb_size = align((align(width, get_db_pitch_alignment(dec)) * height * 9) / 4, 256) * in calc_dpb_size()
424 dpb_size = align((align(width, get_db_pitch_alignment(dec)) * height * 3) / 2, 256) * in calc_dpb_size()
433 dpb_size = image_size * max_references; in calc_dpb_size()
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| D | radeon_vcn_dec.c | 1809 if (dec->dpb_size) { in rvcn_dec_message_decode()
1811 r = si_vid_create_tmz_buffer(dec->screen, &dec->dpb, dec->dpb_size, PIPE_USAGE_DEFAULT); in rvcn_dec_message_decode()
1813 r = si_vid_create_buffer(dec->screen, &dec->dpb, dec->dpb_size, PIPE_USAGE_DEFAULT); in rvcn_dec_message_decode()
1906 decode->dpb_size = (dec->dpb_type != DPB_DYNAMIC_TIER_2) ? dec->dpb.res->buf->size : 0; in rvcn_dec_message_decode()
2353 unsigned width_in_mb, height_in_mb, image_size, dpb_size; in calc_dpb_size() local
2404 dpb_size = image_size * max_references; in calc_dpb_size()
2417 dpb_size = align((align(width, 64) * align(height, 64) * 9) / 4, 256) * max_references; in calc_dpb_size()
2419 dpb_size = align((align(width, 32) * height * 3) / 2, 256) * max_references; in calc_dpb_size()
2427 dpb_size = image_size * max_references; in calc_dpb_size()
2430 dpb_size += width_in_mb * height_in_mb * 128; in calc_dpb_size()
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| D | radeon_vcn_enc_4_0.c | 97 enc->enc_pic.ctx_buf.colloc_buffer_offset = enc->dpb_size; in radeon_enc_ctx()
116 assert(offset == enc->dpb_size); in radeon_enc_ctx()
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| D | radeon_vcn_dec.h | 51 unsigned dpb_size; member
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| D | radeon_vcn_enc.h | 583 unsigned dpb_size; member
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| /third_party/ffmpeg/libavcodec/ |
| D | nvdec_hevc.c | 83 int i, j, dpb_size, ret; in nvdec_hevc_start_frame() local
225 dpb_size = 0; in nvdec_hevc_start_frame()
230 if (dpb_size >= FF_ARRAY_ELEMS(ppc->RefPicIdx)) { in nvdec_hevc_start_frame()
234 dpb_add(ppc, dpb_size++, ref); in nvdec_hevc_start_frame()
237 for (i = dpb_size; i < FF_ARRAY_ELEMS(ppc->RefPicIdx); i++) in nvdec_hevc_start_frame()
241 for (j = 0; j < dpb_size; j++) { in nvdec_hevc_start_frame()
249 for (j = 0; j < dpb_size; j++) { in nvdec_hevc_start_frame()
257 for (j = 0; j < dpb_size; j++) { in nvdec_hevc_start_frame()
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| D | nvdec_h264.c | 60 int i, dpb_size, ret; in nvdec_h264_start_frame() local
117 dpb_size = 0; in nvdec_h264_start_frame()
119 dpb_add(h, &ppc->dpb[dpb_size++], h->short_ref[i], h->short_ref[i]->frame_num); in nvdec_h264_start_frame()
122 dpb_add(h, &ppc->dpb[dpb_size++], h->long_ref[i], i); in nvdec_h264_start_frame()
125 for (i = dpb_size; i < FF_ARRAY_ELEMS(ppc->dpb); i++) in nvdec_h264_start_frame()
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| D | nvdec.c | 56 unsigned int dpb_size; member
250 if (pool->nb_allocated >= pool->dpb_size) in nvdec_decoder_frame_alloc()
427 pool->dpb_size = frames_ctx->initial_pool_size; in ff_nvdec_decode_init()
697 int dpb_size, in ff_nvdec_frame_params() argument
728 frames_ctx->initial_pool_size = dpb_size + 2; in ff_nvdec_frame_params()
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| D | nvdec.h | 81 int dpb_size,
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| D | nvenc.h | 218 int dpb_size; member
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| D | nvenc_hevc.c | 153 … OFFSET(dpb_size), AV_OPT_TYPE_INT, { .i64 = 0 }, 0, INT_MAX, VE },
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| D | nvenc_h264.c | 172 … OFFSET(dpb_size), AV_OPT_TYPE_INT, { .i64 = 0 }, 0, INT_MAX, VE },
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| D | nvenc.c | 1062 if (ctx->dpb_size >= 0) { in nvenc_setup_h264_config()
1064 h264->maxNumRefFrames = ctx->dpb_size; in nvenc_setup_h264_config()
1159 if (ctx->dpb_size >= 0) { in nvenc_setup_hevc_config()
1161 hevc->maxNumRefFramesInDPB = ctx->dpb_size; in nvenc_setup_hevc_config()
1324 ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6); in nvenc_setup_encoder()
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| /third_party/ffmpeg/libavcodec/tests/ |
| D | h264_levels.c | 107 int dpb_size; member
210 test_dpb[i].dpb_size); in main()
213 test_dpb[i].dpb_size); in main()
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| D | h265_levels.c | 70 int dpb_size; member
271 0, 0, 0, test_dpb[i].dpb_size); in main()
274 test_dpb[i].dpb_size); in main()
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| /third_party/libdrm/tests/amdgpu/ |
| D | cs_tests.c | 275 const unsigned dpb_size = 15923584, dt_size = 737280; in amdgpu_cs_uvd_decode() local
290 req.alloc_size += ALIGN(dpb_size, 4*1024); in amdgpu_cs_uvd_decode()
346 memset(ptr, 0, dpb_size); in amdgpu_cs_uvd_decode()
348 ptr += ALIGN(dpb_size, 4*1024); in amdgpu_cs_uvd_decode()
373 dt_addr = ALIGN(dpb_addr + dpb_size, 4*1024); in amdgpu_cs_uvd_decode()
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| D | vcn_tests.c | 329 const unsigned dpb_size = 15923584, dt_size = 737280; in amdgpu_cs_vcn_dec_decode() local
339 size += ALIGN(dpb_size, 4*1024); in amdgpu_cs_vcn_dec_decode()
366 dec += ALIGN(dpb_size, 4*1024); in amdgpu_cs_vcn_dec_decode()
374 dt_addr = ALIGN(dpb_addr + dpb_size, 4*1024); in amdgpu_cs_vcn_dec_decode()
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| /third_party/mesa3d/src/amd/common/ |
| D | ac_uvd_dec.h | 357 uint32_t dpb_size; member
369 uint32_t dpb_size; member
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| /third_party/gstreamer/gstplugins_bad/sys/d3d11/ |
| D | gstd3d11decoder.cpp | 166 guint dpb_size; member
314 self->dpb_size = 0; in gst_d3d11_decoder_reset()
476 pool_size = self->dpb_size + self->downstream_min_buffers; in gst_d3d11_decoder_prepare_output_view_pool()
479 "(dpb size: %d, downstream min buffers: %d)", pool_size, self->dpb_size, in gst_d3d11_decoder_prepare_output_view_pool()
713 gint coded_height, guint dpb_size) in gst_d3d11_decoder_configure() argument
722 g_return_val_if_fail (dpb_size > 0, FALSE); in gst_d3d11_decoder_configure()
738 decoder->dpb_size = dpb_size; in gst_d3d11_decoder_configure()
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| D | gstd3d11decoder.h | 82 guint dpb_size);
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| /third_party/gstreamer/gstplugins_bad/sys/va/ |
| D | gstvah264dec.c | 82 gint dpb_size; member
678 if (self->dpb_size < max_dpb_size) in gst_va_h264_dec_new_sequence()
679 self->dpb_size = max_dpb_size; in gst_va_h264_dec_new_sequence()
754 base->min_buffers = self->dpb_size + 4; /* dpb size + scratch surfaces */ in gst_va_h264_dec_new_sequence()
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| D | gstvah265dec.c | 95 gint dpb_size; member
1058 if (self->dpb_size < max_dpb_size) in gst_va_h265_dec_new_sequence()
1059 self->dpb_size = max_dpb_size; in gst_va_h265_dec_new_sequence()
1126 base->min_buffers = self->dpb_size + 4; /* dpb size + scratch surfaces */ in gst_va_h265_dec_new_sequence()
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| /third_party/mesa3d/docs/relnotes/ |
| D | 20.2.4.rst | 127 - radeon/vcn : Corrected dpb_size calculation for VP9_2
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