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Searched refs:enabled_channels (Results 1 – 7 of 7) sorted by relevance

/third_party/mesa3d/src/amd/vulkan/
Dradv_nir_to_llvm.c573 unsigned enabled_channels, unsigned target, struct ac_export_args *args) in si_llvm_init_export_args() argument
576 args->enabled_channels = enabled_channels; in si_llvm_init_export_args()
610 args->enabled_channels = 0; /* writemask */ in si_llvm_init_export_args()
615 args->enabled_channels = 1; in si_llvm_init_export_args()
620 args->enabled_channels = 0x3; in si_llvm_init_export_args()
627 args->enabled_channels = 0x3; in si_llvm_init_export_args()
631 args->enabled_channels = 0x9; in si_llvm_init_export_args()
638 args->enabled_channels = 0xf; in si_llvm_init_export_args()
647 args->enabled_channels = 0xf; in si_llvm_init_export_args()
652 args->enabled_channels = 0xf; in si_llvm_init_export_args()
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/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_shader_llvm_ps.c273 args->enabled_channels = 0xf; /* writemask */ in si_llvm_init_ps_export_args()
302 args->enabled_channels = 1; /* writemask */ in si_llvm_init_ps_export_args()
307 args->enabled_channels = 0x3; /* writemask */ in si_llvm_init_ps_export_args()
314 args->enabled_channels = 0x3; /* writemask */ in si_llvm_init_ps_export_args()
318 args->enabled_channels = 0x9; /* writemask */ in si_llvm_init_ps_export_args()
388 args->enabled_channels = 0x3; in si_llvm_init_ps_export_args()
427 assert(exp->args[exp->num].enabled_channels); in si_export_mrt_color()
435 assert(exp->args[exp->num].enabled_channels); in si_export_mrt_color()
Dsi_shader_llvm_vs.c421 args->enabled_channels = 0xf; in si_llvm_clipvertex_to_clipdist()
433 args->enabled_channels = 0xf; /* writemask - default is 0xf */ in si_llvm_init_vs_export_args()
562 pos_args[0].enabled_channels = 0xf; /* writemask */ in si_llvm_build_vs_exports()
580 pos_args[1].enabled_channels = writes_psize | in si_llvm_build_vs_exports()
657 pos_args[1].enabled_channels |= 1 << 2; in si_llvm_build_vs_exports()
665 pos_args[1].enabled_channels |= 1 << 3; in si_llvm_build_vs_exports()
721 assert(!param_exports[offset].enabled_channels); in si_llvm_build_vs_exports()
/third_party/mesa3d/src/amd/llvm/
Dac_llvm_build.c1979 args[1] = LLVMConstInt(ctx->i32, a->enabled_channels, 0); in ac_build_export()
2012 args.enabled_channels = 0x0; /* enabled channels */ in ac_build_export_null()
4154 assert(mrt0->enabled_channels == mrt1->enabled_channels); in ac_build_dual_src_blend_swizzle()
4157 if (mrt0->enabled_channels & (1 << i) && mrt1->enabled_channels & (1 << i)) in ac_build_dual_src_blend_swizzle()
4375 args->enabled_channels = mask; in ac_export_mrt_z()
4417 pos.enabled_channels = 0xf; in ac_build_sendmsg_gs_alloc_req()
4486 args.enabled_channels = 1; in ac_build_export_prim()
Dac_llvm_build.h337 unsigned enabled_channels; member
/third_party/mesa3d/src/amd/compiler/
Daco_instruction_selection.cpp11078 unsigned enabled_channels = 0; in export_fs_mrt_z() local
11095 enabled_channels |= ctx->program->gfx_level >= GFX11 ? 0x1 : 0x3; in export_fs_mrt_z()
11101 enabled_channels |= ctx->program->gfx_level >= GFX11 ? 0x2 : 0xc; in export_fs_mrt_z()
11118 enabled_channels |= 0x2; in export_fs_mrt_z()
11123 enabled_channels |= 0x1; in export_fs_mrt_z()
11128 enabled_channels |= 0x2; in export_fs_mrt_z()
11133 enabled_channels |= 0x4; in export_fs_mrt_z()
11140 enabled_channels |= 0x8; in export_fs_mrt_z()
11149 enabled_channels |= 0x1; in export_fs_mrt_z()
11152 bld.exp(aco_opcode::exp, values[0], values[1], values[2], values[3], enabled_channels, in export_fs_mrt_z()
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/third_party/mesa3d/docs/relnotes/
D21.1.0.rst4779 - radv/llvm: fix enabled_channels for compressed exports