Searched refs:num_pipes (Results 1 – 14 of 14) sorted by relevance
104 uint32_t num_pipes; member221 surf_man->hw_info.num_pipes = 1; in r6_init_hw_info()224 surf_man->hw_info.num_pipes = 2; in r6_init_hw_info()227 surf_man->hw_info.num_pipes = 4; in r6_init_hw_info()230 surf_man->hw_info.num_pipes = 8; in r6_init_hw_info()233 surf_man->hw_info.num_pipes = 8; in r6_init_hw_info()376 yalign = tilew * surf_man->hw_info.num_pipes; in r6_surface_init_2d()382 MAX2(surf_man->hw_info.num_pipes * in r6_surface_init_2d()506 surf_man->hw_info.num_pipes = 1; in eg_init_hw_info()509 surf_man->hw_info.num_pipes = 2; in eg_init_hw_info()[all …]
313 const unsigned num_pipes = MAX2(num_rbs, sctx->screen->info.num_tcc_blocks); in gfx10_get_bin_sizes() local316 ((ZsNumTags * num_rbs / num_pipes) * (ZsTagSize * num_pipes)); in gfx10_get_bin_sizes()318 ((CcReadTags * num_rbs / num_pipes) * (CcTagSize * num_pipes)); in gfx10_get_bin_sizes()320 ((FcReadTags * num_rbs / num_pipes) * (FcTagSize * num_pipes)); in gfx10_get_bin_sizes()
228 unsigned num_pipes = info->num_tile_pipes; in si_compute_cmask() local236 switch (num_pipes) { in si_compute_cmask()258 unsigned base_align = num_pipes * pipe_interleave_bytes; in si_compute_cmask()288 unsigned num_pipes = info->num_tile_pipes; in si_compute_htile() local303 if (info->gfx_level >= GFX7 && num_pipes < 4) in si_compute_htile()304 num_pipes = 4; in si_compute_htile()306 switch (num_pipes) { in si_compute_htile()339 base_align = num_pipes * pipe_interleave_bytes; in si_compute_htile()
53 unsigned int num_pipes : 3; member91 unsigned int num_pipes : 3; member
300 unsigned num_pipes = G_0098F8_NUM_PIPES(info->gb_addr_config); in test_modifier() local302 G_0098F8_NUM_PKRS(info->gb_addr_config) == num_pipes && num_pipes > 1) in test_modifier()303 ++num_pipes; in test_modifier()305 num_pipes + in test_modifier()309 (num_pipes + in test_modifier()
401 unsigned num_pipes = 1 << pipe_xor_bits; in ac_get_supported_modifiers() local408 if (num_pipes > 16) in ac_get_supported_modifiers()957 unsigned num_pipes = info->num_tile_pipes; in ac_compute_cmask() local966 switch (num_pipes) { in ac_compute_cmask()988 unsigned base_align = num_pipes * pipe_interleave_bytes; in ac_compute_cmask()
57 q->num_pipes = r300screen->info.r300_num_z_pipes; in r300_create_query()59 q->num_pipes = r300screen->info.r300_num_gb_pipes; in r300_create_query()
289 unsigned num_pipes; member
770 query->num_results += query->num_pipes; in r300_emit_query_end()
676 unsigned num_pipes = rscreen->info.num_tile_pipes; in r600_texture_get_cmask_info() local679 unsigned elements_per_macro_tile = (cmask_cache_bits / element_bits) * num_pipes; in r600_texture_get_cmask_info()688 unsigned base_align = num_pipes * pipe_interleave_bytes; in r600_texture_get_cmask_info()755 unsigned num_pipes = rscreen->info.num_tile_pipes; in r600_texture_get_htile_size() local765 switch (num_pipes) { in r600_texture_get_htile_size()798 base_align = num_pipes * pipe_interleave_bytes; in r600_texture_get_htile_size()
611 unsigned num_pipes = rctx->screen->b.info.r600_max_quad_pipes; in evergreen_emit_dispatch() local612 unsigned wave_divisor = (16 * num_pipes); in evergreen_emit_dispatch()632 num_pipes, num_waves, lds_size); in evergreen_emit_dispatch()
1754 unsigned num_pipes = rctx->screen->b.info.r600_max_quad_pipes; in r600_setup_scratch_area_for_shader() local1758 unsigned size = align(itemsize * nthreads * num_pipes * num_ses * 4, 256); in r600_setup_scratch_area_for_shader()
4540 unsigned num_pipes = rctx->screen->b.info.r600_max_quad_pipes; in evergreen_setup_tess_constants() local4541 unsigned wave_divisor = (16 * num_pipes); in evergreen_setup_tess_constants()
1492 int num_pipes = G_0098F8_NUM_PIPES(rad_info->gb_addr_config); in radv_image_is_pipe_misaligned() local1493 int overlap = MAX2(0, log2_bpp_and_samples + num_pipes - 8); in radv_image_is_pipe_misaligned()