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Searched refs:or_mask (Results 1 – 5 of 5) sorted by relevance

/third_party/mesa3d/src/freedreno/common/
Dfreedreno_common.h32 #define or_mask(d, mask) \ macro
38 #define or_mask(d, mask) \ macro
/third_party/mesa3d/src/gallium/drivers/freedreno/
Dfreedreno_context.h603 or_mask(dirty, FD_DIRTY_RESOURCE); in fd_context_dirty()
605 or_mask(ctx->dirty, dirty); in fd_context_dirty()
629 or_mask(ctx->dirty_shader[shader], dirty); in fd_context_dirty_shader()
Dfreedreno_resource.h247 or_mask(rsc->dirty, usage); in fd_resource_set_usage()
/third_party/mesa3d/src/amd/llvm/
Dac_llvm_build.c3379 static inline unsigned ds_pattern_bitmode(unsigned and_mask, unsigned or_mask, unsigned xor_mask) in ds_pattern_bitmode() argument
3381 assert(and_mask < 32 && or_mask < 32 && xor_mask < 32); in ds_pattern_bitmode()
3382 return and_mask | (or_mask << 5) | (xor_mask << 10); in ds_pattern_bitmode()
/third_party/mesa3d/src/amd/compiler/
Daco_instruction_selection.cpp238 unsigned or_mask = (mask >> 5) & 0x1f; in emit_masked_swizzle() local
243 if (and_mask == 0x1f && or_mask < 4 && xor_mask < 4) { in emit_masked_swizzle()
246 res[i] = ((res[i] | or_mask) ^ xor_mask) & 0x3; in emit_masked_swizzle()
248 } else if (and_mask == 0x1f && !or_mask && xor_mask == 8) { in emit_masked_swizzle()
250 } else if (and_mask == 0x1f && !or_mask && xor_mask == 0xf) { in emit_masked_swizzle()
252 } else if (and_mask == 0x1f && !or_mask && xor_mask == 0x7) { in emit_masked_swizzle()
254 } else if (ctx->options->gfx_level >= GFX10 && (and_mask & 0x18) == 0x18 && or_mask < 8 && in emit_masked_swizzle()
259 ret.instr->dpp8().lane_sel[i] = (((i & and_mask) | or_mask) ^ xor_mask) & 0x7; in emit_masked_swizzle()