| /third_party/mesa3d/src/intel/compiler/ |
| D | gfx6_gs_visitor.cpp | 148 dst.reladdr = ralloc(mem_ctx, src_reg); in gs_emit_vertex()
149 memcpy(dst.reladdr, &this->vertex_output_offset, sizeof(src_reg)); in gs_emit_vertex()
166 dst.reladdr = ralloc(mem_ctx, src_reg); in gs_emit_vertex()
167 memcpy(dst.reladdr, &this->vertex_output_offset, sizeof(src_reg)); in gs_emit_vertex()
178 dst.reladdr = ralloc(mem_ctx, src_reg); in gs_emit_vertex()
179 memcpy(dst.reladdr, &this->vertex_output_offset, sizeof(src_reg)); in gs_emit_vertex()
238 dst.reladdr = ralloc(mem_ctx, src_reg); in gs_end_primitive()
239 memcpy(dst.reladdr, &offset, sizeof(src_reg)); in gs_end_primitive()
270 flags_data.reladdr = ralloc(mem_ctx, src_reg); in emit_urb_write_header()
271 memcpy(flags_data.reladdr, &flags_offset, sizeof(src_reg)); in emit_urb_write_header()
[all …]
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| D | brw_vec4_visitor.cpp | 1070 src_reg *reladdr, int reg_offset) in get_scratch_offset() argument
1083 if (reladdr) { in get_scratch_offset()
1091 emit_before(block, inst, ADD(dst_reg(index), *reladdr, in get_scratch_offset()
1096 emit_before(block, inst, MUL(dst_reg(index), *reladdr, in get_scratch_offset()
1120 src_reg index = get_scratch_offset(block, inst, orig_src.reladdr, in emit_scratch_read()
1129 index = get_scratch_offset(block, inst, orig_src.reladdr, reg_offset + 1); in emit_scratch_read()
1149 src_reg index = get_scratch_offset(block, inst, inst->dst.reladdr, in emit_scratch_write()
1205 src_reg index = get_scratch_offset(block, inst, inst->dst.reladdr, in emit_scratch_write()
1220 inst->dst.reladdr = NULL; in emit_scratch_write()
1240 if (src.reladdr) in emit_resolve_reladdr()
[all …]
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| D | brw_vec4.cpp | 73 this->reladdr = NULL; in src_reg()
79 this->reladdr = reg.reladdr; in src_reg()
131 this->reladdr = NULL; in dst_reg()
138 this->reladdr = reg.reladdr; in dst_reg()
145 (reladdr == r.reladdr || in equals()
146 (reladdr && r.reladdr && reladdr->equals(*r.reladdr)))); in equals()
384 !reladdr && !r.reladdr); in equals()
391 !reladdr && !r.reladdr; in negative_equals()
595 assert(!inst->src[i].reladdr); in split_uniform_registers()
965 inst->src[0].abs || inst->src[0].negate || inst->src[0].reladdr) in opt_register_coalesce()
[all …]
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| D | brw_ir_vec4.h | 53 src_reg *reladdr; variable
147 (!reg.reladdr || is_uniform(*reg.reladdr)); in is_uniform()
170 src_reg *reladdr; variable
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| D | brw_vec4_copy_propagation.cpp | 50 !inst->dst.reladdr && in is_direct_copy()
51 !inst->src[0].reladdr && in is_direct_copy()
494 inst->src[i].reladdr) in opt_copy_propagation()
534 if (inst->dst.reladdr) in opt_copy_propagation()
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| D | brw_vec4_reg_allocate.cpp | 372 if (inst->src[i].reladdr || in evaluate_spill_costs()
401 if (inst->dst.reladdr || inst->dst.offset >= REG_SIZE) in evaluate_spill_costs()
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| D | brw_vec4.h | 266 src_reg *reladdr, int reg_offset);
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| D | brw_vec4_nir.cpp | 183 reg.reladdr = in dst_reg_for_nir_reg()
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| /third_party/mesa3d/src/gallium/drivers/r300/compiler/ |
| D | radeon_program_print.c | 128 static void rc_print_register(FILE * f, rc_register_file file, int index, unsigned int reladdr) in rc_print_register() argument
149 fprintf(f, "%s[%i%s]", filename, index, reladdr ? " + addr[0]" : ""); in rc_print_register()
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| /third_party/mesa3d/src/gallium/auxiliary/nir/ |
| D | nir_to_tgsi.c | 2614 struct ureg_src reladdr = ntt_get_src(c, instr->src[sampler_src].src); in ntt_emit_texture() local
2615 sampler = ureg_src_indirect(sampler, ntt_reladdr(c, reladdr, 2)); in ntt_emit_texture()
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| /third_party/mesa3d/docs/relnotes/ |
| D | 7.10.rst | 1363 - i965: Drop push-mode reladdr constant loading and always use
1392 - i965: Add support for gen6 reladdr VS constant loading.
|