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Searched refs:shfl (Results 1 – 10 of 10) sorted by relevance

/third_party/mesa3d/src/nouveau/codegen/
Dnv50_ir_lowering_gm107.cpp226 Instruction *shfl; in handleDFDX() local
243 shfl = bld.mkOp3(OP_SHFL, TYPE_F32, bld.getScratch(), insn->getSrc(0), in handleDFDX()
245 shfl->subOp = NV50_IR_SUBOP_SHFL_BFLY; in handleDFDX()
250 insn->setSrc(0, shfl->getDef(0)); in handleDFDX()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
DIntrinsicImpl.inc4678 "llvm.nvvm.shfl.bfly.f32",
4679 "llvm.nvvm.shfl.bfly.f32p",
4680 "llvm.nvvm.shfl.bfly.i32",
4681 "llvm.nvvm.shfl.bfly.i32p",
4682 "llvm.nvvm.shfl.down.f32",
4683 "llvm.nvvm.shfl.down.f32p",
4684 "llvm.nvvm.shfl.down.i32",
4685 "llvm.nvvm.shfl.down.i32p",
4686 "llvm.nvvm.shfl.idx.f32",
4687 "llvm.nvvm.shfl.idx.f32p",
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
DIntrinsicsNVVM.td316 string IntrName = "llvm.nvvm.shfl." # !subst("_",".", Suffix);
4007 // Generate intrinsics for all variants of shfl instruction.
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen3193 nvvm_shfl_bfly_f32, // llvm.nvvm.shfl.bfly.f32
3194 nvvm_shfl_bfly_i32, // llvm.nvvm.shfl.bfly.i32
3195 nvvm_shfl_down_f32, // llvm.nvvm.shfl.down.f32
3196 nvvm_shfl_down_i32, // llvm.nvvm.shfl.down.i32
3197 nvvm_shfl_idx_f32, // llvm.nvvm.shfl.idx.f32
3198 nvvm_shfl_idx_i32, // llvm.nvvm.shfl.idx.i32
3199 nvvm_shfl_up_f32, // llvm.nvvm.shfl.up.f32
3200 nvvm_shfl_up_i32, // llvm.nvvm.shfl.up.i32
9251 "llvm.nvvm.shfl.bfly.f32",
9252 "llvm.nvvm.shfl.bfly.i32",
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen3193 nvvm_shfl_bfly_f32, // llvm.nvvm.shfl.bfly.f32
3194 nvvm_shfl_bfly_i32, // llvm.nvvm.shfl.bfly.i32
3195 nvvm_shfl_down_f32, // llvm.nvvm.shfl.down.f32
3196 nvvm_shfl_down_i32, // llvm.nvvm.shfl.down.i32
3197 nvvm_shfl_idx_f32, // llvm.nvvm.shfl.idx.f32
3198 nvvm_shfl_idx_i32, // llvm.nvvm.shfl.idx.i32
3199 nvvm_shfl_up_f32, // llvm.nvvm.shfl.up.f32
3200 nvvm_shfl_up_i32, // llvm.nvvm.shfl.up.i32
9251 "llvm.nvvm.shfl.bfly.f32",
9252 "llvm.nvvm.shfl.bfly.i32",
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen3187 nvvm_shfl_bfly_f32, // llvm.nvvm.shfl.bfly.f32
3188 nvvm_shfl_bfly_i32, // llvm.nvvm.shfl.bfly.i32
3189 nvvm_shfl_down_f32, // llvm.nvvm.shfl.down.f32
3190 nvvm_shfl_down_i32, // llvm.nvvm.shfl.down.i32
3191 nvvm_shfl_idx_f32, // llvm.nvvm.shfl.idx.f32
3192 nvvm_shfl_idx_i32, // llvm.nvvm.shfl.idx.i32
3193 nvvm_shfl_up_f32, // llvm.nvvm.shfl.up.f32
3194 nvvm_shfl_up_i32, // llvm.nvvm.shfl.up.i32
9211 "llvm.nvvm.shfl.bfly.f32",
9212 "llvm.nvvm.shfl.bfly.i32",
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/
DIntrinsics.gen3193 nvvm_shfl_bfly_f32, // llvm.nvvm.shfl.bfly.f32
3194 nvvm_shfl_bfly_i32, // llvm.nvvm.shfl.bfly.i32
3195 nvvm_shfl_down_f32, // llvm.nvvm.shfl.down.f32
3196 nvvm_shfl_down_i32, // llvm.nvvm.shfl.down.i32
3197 nvvm_shfl_idx_f32, // llvm.nvvm.shfl.idx.f32
3198 nvvm_shfl_idx_i32, // llvm.nvvm.shfl.idx.i32
3199 nvvm_shfl_up_f32, // llvm.nvvm.shfl.up.f32
3200 nvvm_shfl_up_i32, // llvm.nvvm.shfl.up.i32
9251 "llvm.nvvm.shfl.bfly.f32",
9252 "llvm.nvvm.shfl.bfly.i32",
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen3193 nvvm_shfl_bfly_f32, // llvm.nvvm.shfl.bfly.f32
3194 nvvm_shfl_bfly_i32, // llvm.nvvm.shfl.bfly.i32
3195 nvvm_shfl_down_f32, // llvm.nvvm.shfl.down.f32
3196 nvvm_shfl_down_i32, // llvm.nvvm.shfl.down.i32
3197 nvvm_shfl_idx_f32, // llvm.nvvm.shfl.idx.f32
3198 nvvm_shfl_idx_i32, // llvm.nvvm.shfl.idx.i32
3199 nvvm_shfl_up_f32, // llvm.nvvm.shfl.up.f32
3200 nvvm_shfl_up_i32, // llvm.nvvm.shfl.up.i32
9251 "llvm.nvvm.shfl.bfly.f32",
9252 "llvm.nvvm.shfl.bfly.i32",
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/
DNVPTXInstrInfo.td153 // non-sync shfl instructions are not available on sm_70+ in PTX6.4+
DNVPTXIntrinsics.td157 let AsmString = "shfl."