1
2 #include "../sfn_instr_alugroup.h"
3 #include "../sfn_instr_export.h"
4 #include "../sfn_instr_fetch.h"
5 #include "../sfn_instr_lds.h"
6 #include "../sfn_instr_tex.h"
7
8 #include "gtest/gtest.h"
9
10 using namespace r600;
11
12 using std::vector;
13
14 class InstrTest : public ::testing::Test
15 {
SetUp()16 void SetUp() override {
17 init_pool();
18 }
19
TearDown()20 void TearDown() override {
21 release_pool();
22 }
23 protected:
check(const Instr & lhs,const Instr & rhs) const24 void check(const Instr& lhs,const Instr& rhs) const {
25 EXPECT_EQ(lhs, rhs);
26 }
27 };
28
29
TEST_F(InstrTest,test_alu_barrier)30 TEST_F(InstrTest, test_alu_barrier)
31 {
32 AluInstr alu(op0_group_barrier);
33
34 EXPECT_FALSE(alu.has_alu_flag(alu_write));
35 EXPECT_EQ(alu.opcode(), op0_group_barrier);
36
37 EXPECT_EQ(alu.dest_chan(), 0);
38
39 EXPECT_EQ(alu, alu);
40 }
41
42
TEST_F(InstrTest,test_alu_uni_op_mov)43 TEST_F(InstrTest, test_alu_uni_op_mov)
44 {
45 AluInstr alu(op1_mov,
46 new Register( 128, 2, pin_none),
47 new Register( 129, 0, pin_chan), {alu_write});
48
49 EXPECT_TRUE(alu.has_alu_flag(alu_write));
50
51 EXPECT_FALSE(alu.has_alu_flag(alu_last_instr));
52 EXPECT_FALSE(alu.end_group());
53 EXPECT_FALSE(alu.has_alu_flag(alu_op3));
54 EXPECT_FALSE(alu.has_alu_flag(alu_src0_abs));
55 EXPECT_FALSE(alu.has_alu_flag(alu_src0_neg));
56
57 EXPECT_EQ(alu.opcode(), op1_mov);
58
59 EXPECT_EQ(alu.dest_chan(), 2);
60 auto dest = alu.dest();
61
62 ASSERT_TRUE(dest);
63 EXPECT_EQ(dest->sel(), 128);
64 EXPECT_EQ(dest->chan(), 2);
65 EXPECT_EQ(dest->pin(), pin_none);
66
67 auto src0 = alu.psrc(0);
68 ASSERT_TRUE(src0);
69
70 EXPECT_EQ(src0->sel(), 129);
71 EXPECT_EQ(src0->chan(), 0);
72 EXPECT_EQ(src0->pin(), pin_chan);
73
74 EXPECT_EQ(alu.n_sources(), 1);
75
76 EXPECT_FALSE(alu.psrc(1));
77 EXPECT_FALSE(alu.psrc(2));
78
79 alu.set_alu_flag(alu_src0_abs);
80 EXPECT_TRUE(alu.has_alu_flag(alu_src0_abs));
81
82 alu.set_alu_flag(alu_src0_neg);
83 EXPECT_TRUE(alu.has_alu_flag(alu_src0_neg));
84
85 }
86
TEST_F(InstrTest,test_alu_op2)87 TEST_F(InstrTest, test_alu_op2)
88 {
89 AluInstr alu(op2_add,
90 new Register( 130, 1, pin_none),
91 new Register( 129, 2, pin_chan),
92 new Register( 129, 3, pin_none),
93 {alu_write, alu_last_instr});
94
95 EXPECT_TRUE(alu.has_alu_flag(alu_write));
96
97 EXPECT_TRUE(alu.has_alu_flag(alu_last_instr));
98 EXPECT_FALSE(alu.has_alu_flag(alu_op3));
99
100 EXPECT_FALSE(alu.has_alu_flag(alu_src0_neg));
101 EXPECT_FALSE(alu.has_alu_flag(alu_src1_neg));
102 EXPECT_FALSE(alu.has_alu_flag(alu_src2_neg));
103
104 EXPECT_FALSE(alu.has_alu_flag(alu_src0_rel));
105 EXPECT_FALSE(alu.has_alu_flag(alu_src1_rel));
106 EXPECT_FALSE(alu.has_alu_flag(alu_src2_rel));
107
108 EXPECT_EQ(alu.opcode(), op2_add);
109
110 EXPECT_EQ(alu.dest_chan(), 1);
111 auto dest = alu.dest();
112
113 ASSERT_TRUE(dest);
114 EXPECT_EQ(dest->sel(), 130);
115 EXPECT_EQ(dest->chan(), 1);
116 EXPECT_EQ(dest->pin(), pin_none);
117
118 EXPECT_EQ(alu.n_sources(), 2);
119
120 auto src0 = alu.psrc(0);
121 ASSERT_TRUE(src0);
122
123 EXPECT_EQ(src0->sel(), 129);
124 EXPECT_EQ(src0->chan(), 2);
125 EXPECT_EQ(src0->pin(), pin_chan);
126
127 auto src1 = alu.psrc(1);
128 ASSERT_TRUE(src1);
129
130 EXPECT_EQ(src1->sel(), 129);
131 EXPECT_EQ(src1->chan(), 3);
132 EXPECT_EQ(src1->pin(), pin_none);
133
134 EXPECT_FALSE(alu.psrc(2));
135 EXPECT_EQ(alu, alu);
136 }
137
TEST_F(InstrTest,test_alu_op3)138 TEST_F(InstrTest, test_alu_op3)
139 {
140 AluInstr alu(op3_cnde,
141 new Register( 130, 1, pin_none),
142 new Register( 129, 2, pin_chan),
143 new Register( 129, 3, pin_none),
144 new Register( 131, 1, pin_none),
145 {alu_write, alu_last_instr});
146
147 EXPECT_TRUE(alu.has_alu_flag(alu_write));
148 EXPECT_TRUE(alu.has_alu_flag(alu_last_instr));
149 EXPECT_TRUE(alu.end_group());
150 EXPECT_TRUE(alu.has_alu_flag(alu_op3));
151
152 EXPECT_EQ(alu.opcode(), op3_cnde);
153
154 EXPECT_EQ(alu.dest_chan(), 1);
155 auto dest = alu.dest();
156
157 ASSERT_TRUE(dest);
158 EXPECT_EQ(dest->sel(), 130);
159 EXPECT_EQ(dest->chan(), 1);
160 EXPECT_EQ(dest->pin(), pin_none);
161
162 EXPECT_EQ(alu.n_sources(), 3);
163
164 auto src0 = alu.psrc(0);
165 ASSERT_TRUE(src0);
166
167 EXPECT_EQ(src0->sel(), 129);
168 EXPECT_EQ(src0->chan(), 2);
169 EXPECT_EQ(src0->pin(), pin_chan);
170
171 auto src1 = alu.psrc(1);
172 ASSERT_TRUE(src1);
173
174 EXPECT_EQ(src1->sel(), 129);
175 EXPECT_EQ(src1->chan(), 3);
176 EXPECT_EQ(src1->pin(), pin_none);
177
178 auto src2 = alu.psrc(2);
179 ASSERT_TRUE(src2);
180
181 EXPECT_EQ(src2->sel(), 131);
182 EXPECT_EQ(src2->chan(), 1);
183 EXPECT_EQ(src2->pin(), pin_none);
184
185 EXPECT_EQ(alu, alu);
186 }
187
TEST_F(InstrTest,test_alu_op1_comp)188 TEST_F(InstrTest, test_alu_op1_comp)
189 {
190 auto r128z = new Register( 128, 2, pin_none);
191 auto r128zc = new Register( 128, 2, pin_chan);
192 auto r128y = new Register( 128, 1, pin_none);
193 auto r129x = new Register( 129, 0, pin_none);
194 auto r129xc = new Register( 129, 0, pin_chan);
195 auto r129y = new Register( 129, 1, pin_none);
196 auto r130x = new Register( 130, 0, pin_none);
197
198
199 AluInstr alu1(op1_mov, r128z, r129x, {alu_write});
200 EXPECT_NE(alu1, AluInstr(op1_mov, r128y, r129x, {alu_write}));
201 EXPECT_NE(alu1, AluInstr(op1_mov, r128z, r129xc, {alu_write}));
202 EXPECT_NE(alu1, AluInstr(op1_mov, r128z, r129y, {alu_write}));
203 EXPECT_NE(alu1, AluInstr(op1_mov, r128z, r130x, {alu_write}));
204 EXPECT_NE(alu1, AluInstr(op1_mov, r128z, r129x, {alu_write, alu_last_instr}));
205 EXPECT_NE(alu1, AluInstr(op1_flt_to_int, r128z, r129x, {alu_write}));
206 EXPECT_NE(alu1, AluInstr(op1_mov, r128zc, r129x, {alu_write}));
207
208 EXPECT_EQ(alu1, alu1);
209 }
210
TEST_F(InstrTest,test_alu_op2_comp)211 TEST_F(InstrTest, test_alu_op2_comp)
212 {
213 auto r128x = new Register( 128, 0, pin_none);
214 auto r128y = new Register( 128, 1, pin_none);
215 auto r128z = new Register( 128, 2, pin_none);
216
217 AluInstr alu1(op2_add, r128z, r128x, r128y, {alu_write});
218
219 EXPECT_NE(alu1, AluInstr(op2_add, r128z, r128x, new Register( 129, 2, pin_none), {alu_write}));
220 EXPECT_NE(alu1, AluInstr(op2_add, r128z, r128x, new Register( 128, 0, pin_none), {alu_write}));
221 EXPECT_NE(alu1, AluInstr(op2_add, r128z, r128x, new Register( 128, 1, pin_chan), {alu_write}));
222 }
223
TEST_F(InstrTest,test_alu_op3_comp)224 TEST_F(InstrTest, test_alu_op3_comp)
225 {
226 auto r128x = new Register( 128, 0, pin_none);
227 auto r128y = new Register( 128, 1, pin_none);
228 auto r128z = new Register( 128, 2, pin_none);
229
230 AluInstr alu1(op3_muladd, r128z, r128x, r128y, r128y, {alu_write});
231
232 EXPECT_NE(alu1, AluInstr(op3_muladd, r128z, r128x, r128y, new Register( 129, 2, pin_none), {alu_write}));
233 EXPECT_NE(alu1, AluInstr(op3_muladd, r128z, r128x, r128y, new Register( 128, 0, pin_none), {alu_write}));
234 EXPECT_NE(alu1, AluInstr(op3_muladd, r128z, r128x, r128y, new Register( 128, 1, pin_chan), {alu_write}));
235 }
236
TEST_F(InstrTest,test_alu_op3_ne)237 TEST_F(InstrTest, test_alu_op3_ne)
238 {
239 auto R130x = new Register( 130, 0, pin_none);
240 auto R130y = new Register( 130, 1, pin_none);
241 auto R130z = new Register( 130, 2, pin_none);
242 auto R131z = new Register( 131, 2, pin_none);
243 auto R131w = new Register( 131, 3, pin_none);
244
245 AluInstr alu(op3_cnde, R130x, R130y, R131z, R131w, {alu_write, alu_last_instr});
246
247 EXPECT_NE(alu, AluInstr(op3_muladd, R130x, R130y, R131z, R131w, {alu_write, alu_last_instr}));
248
249 EXPECT_NE(alu, AluInstr(op3_cnde, R130z, R130y, R131z, R131w, {alu_write, alu_last_instr}));
250 EXPECT_NE(alu, AluInstr(op3_cnde, R130x, R130z, R131z, R131w, {alu_write, alu_last_instr}));
251 EXPECT_NE(alu, AluInstr(op3_cnde, R130x, R130y, R130z, R131w, {alu_write, alu_last_instr}));
252 EXPECT_NE(alu, AluInstr(op3_cnde, R130x, R130y, R131z, R130z, {alu_write, alu_last_instr}));
253 EXPECT_NE(alu, AluInstr(op3_cnde, R130x, R130y, R131z, R131w, {alu_write}));
254
255 AluInstr alu_cf_changes = alu;
256 alu_cf_changes.set_cf_type(cf_alu_push_before);
257
258 EXPECT_NE(alu, alu_cf_changes);
259
260 AluInstr alu_bs_changes = alu;
261 alu_bs_changes.set_bank_swizzle(alu_vec_021);
262
263 EXPECT_NE(alu, alu_bs_changes);
264 };
265
266
TEST_F(InstrTest,test_alu_op1_ne)267 TEST_F(InstrTest, test_alu_op1_ne)
268 {
269 auto R130x = new Register( 130, 0, pin_none);
270 auto R130y = new Register( 130, 1, pin_none);
271 auto R130z = new Register( 130, 2, pin_none);
272
273 AluInstr alu(op1_mov, R130x, R130y, {alu_write, alu_last_instr});
274
275 EXPECT_NE(alu, AluInstr(op1_cos, R130x, R130y, {alu_write, alu_last_instr}));
276
277 EXPECT_NE(alu, AluInstr(op1_mov, R130z, R130y, {alu_write, alu_last_instr}));
278 EXPECT_NE(alu, AluInstr(op1_mov, R130x, R130z, {alu_write, alu_last_instr}));
279 EXPECT_NE(alu, AluInstr(op1_mov, R130x, R130y, {alu_last_instr}));
280
281 AluInstr alu_cf_changes = alu;
282 alu_cf_changes.set_cf_type(cf_alu_push_before);
283
284 EXPECT_NE(alu, alu_cf_changes);
285
286 AluInstr alu_bs_changes = alu;
287 alu_bs_changes.set_bank_swizzle(alu_vec_021);
288
289 EXPECT_NE(alu, alu_bs_changes);
290 };
291
TEST_F(InstrTest,test_alu_dot4_grouped)292 TEST_F(InstrTest, test_alu_dot4_grouped)
293 {
294 auto R130x = new Register( 130, 0, pin_none);
295 auto R130y = new Register( 130, 1, pin_none);
296 auto R130z = new Register( 130, 2, pin_none);
297 auto R130w = new Register( 130, 3, pin_none);
298
299 auto R131x = new Register( 131, 0, pin_none);
300 auto R131y = new Register( 131, 1, pin_none);
301 auto R131z = new Register( 131, 2, pin_none);
302 auto R131w = new Register( 131, 3, pin_none);
303
304 auto R132x = new Register( 132, 0, pin_chan);
305 auto R132y = new Register( 132, 1, pin_chan);
306 auto R132z = new Register( 132, 2, pin_chan);
307 auto R132w = new Register( 132, 3, pin_chan);
308
309 AluInstr::SrcValues src({R130x, R130y, R130z, R130w,
310 R131x, R131y, R131z, R131w});
311
312 AluInstr alu(op2_dot4_ieee, R132x, src, {alu_write, alu_last_instr}, 4);
313
314 EXPECT_NE(alu, AluInstr(op1_cos, R130x, R130y, {alu_write, alu_last_instr}));
315 EXPECT_EQ(alu, alu);
316
317 ValueFactory vf;
318 auto group = alu.split(vf);
319 group->fix_last_flag();
320 ASSERT_TRUE(group);
321
322 auto i = group->begin();
323 EXPECT_NE(i, group->end());
324 ASSERT_TRUE(*i);
325 check(**i, AluInstr(op2_dot4_ieee, R132x, R130x, R130y, {alu_write}));
326 ++i;
327 EXPECT_NE(i, group->end());
328 ASSERT_TRUE(*i);
329 check(**i, AluInstr(op2_dot4_ieee, R132y, R130z, R130w, {}));
330 ++i;
331 EXPECT_NE(i, group->end());
332 ASSERT_TRUE(*i);
333 check(**i, AluInstr(op2_dot4_ieee, R132z, R131x, R131y, {}));
334 ++i;
335 EXPECT_NE(i, group->end());
336 ASSERT_TRUE(*i);
337 check(**i, AluInstr(op2_dot4_ieee, R132w, R131z, R131w, {alu_last_instr}));
338 ++i;
339 EXPECT_NE(i, group->end());
340 ASSERT_FALSE(*i);
341 ++i;
342 EXPECT_EQ(i, group->end());
343 };
344
345
346
347
348 #ifdef __cpp_exceptions
TEST_F(InstrTest,test_alu_wrong_source_count)349 TEST_F(InstrTest, test_alu_wrong_source_count)
350 {
351 EXPECT_THROW(AluInstr(op3_cnde,
352 new Register( 130, 1, pin_none),
353 new Register( 129, 2, pin_chan),
354 new Register( 129, 3, pin_none),
355 {alu_write, alu_last_instr}), std::invalid_argument);
356
357 EXPECT_THROW(AluInstr(op3_cnde,
358 new Register( 130, 1, pin_none),
359 new Register( 129, 2, pin_chan),
360 {alu_write, alu_last_instr}), std::invalid_argument);
361
362 EXPECT_THROW(AluInstr(op1_mov,
363 new Register( 130, 1, pin_none),
364 new Register( 129, 2, pin_chan),
365 new Register( 129, 2, pin_chan),
366 {alu_write, alu_last_instr}), std::invalid_argument);
367
368 EXPECT_THROW(AluInstr(op2_add,
369 new Register( 130, 1, pin_none),
370 new Register( 129, 2, pin_chan),
371 {alu_write, alu_last_instr}), std::invalid_argument);
372
373 EXPECT_THROW(AluInstr(op2_add,
374 new Register( 130, 1, pin_none),
375 new Register( 129, 2, pin_chan),
376 new Register( 129, 2, pin_chan),
377 new Register( 129, 2, pin_chan),
378 {alu_write, alu_last_instr}), std::invalid_argument);
379 }
380
TEST_F(InstrTest,test_alu_write_no_dest)381 TEST_F(InstrTest, test_alu_write_no_dest)
382 {
383 EXPECT_THROW(AluInstr(op2_add,
384 nullptr,
385 new Register( 129, 2, pin_chan),
386 new Register( 129, 2, pin_chan),
387 {alu_write, alu_last_instr}), std::invalid_argument);
388 }
389
390 #endif
391
TEST_F(InstrTest,test_tex_basic)392 TEST_F(InstrTest, test_tex_basic)
393 {
394 TexInstr tex(TexInstr::sample,
395 RegisterVec4(129),
396 {0,1,2,3},
397 RegisterVec4(130),
398 1,
399 17);
400
401 EXPECT_EQ(tex.opcode(), TexInstr::sample);
402
403 auto& dst = tex.dst();
404 auto& src = tex.src();
405
406 for (int i = 0; i < 4; ++i) {
407 EXPECT_EQ(*dst[i], Register(129, i, pin_group));
408 EXPECT_EQ(*src[i], Register(130, i, pin_group));
409 EXPECT_EQ(tex.dest_swizzle(i), i);
410 }
411
412 EXPECT_EQ(tex.sampler_id(), 1);
413 EXPECT_EQ(tex.resource_id(), 17);
414
415 EXPECT_TRUE(tex.end_group());
416
417 for (int i = 0; i < 3; ++i)
418 EXPECT_EQ(tex.get_offset(i), 0);
419
420 EXPECT_FALSE(tex.has_tex_flag(TexInstr::x_unnormalized));
421 EXPECT_FALSE(tex.has_tex_flag(TexInstr::y_unnormalized));
422 EXPECT_FALSE(tex.has_tex_flag(TexInstr::z_unnormalized));
423 EXPECT_FALSE(tex.has_tex_flag(TexInstr::w_unnormalized));
424
425 tex.set_tex_flag(TexInstr::x_unnormalized);
426 EXPECT_TRUE(tex.has_tex_flag(TexInstr::x_unnormalized));
427 EXPECT_FALSE(tex.has_tex_flag(TexInstr::y_unnormalized));
428 EXPECT_FALSE(tex.has_tex_flag(TexInstr::z_unnormalized));
429 EXPECT_FALSE(tex.has_tex_flag(TexInstr::w_unnormalized));
430
431 tex.set_tex_flag(TexInstr::y_unnormalized);
432 EXPECT_TRUE(tex.has_tex_flag(TexInstr::x_unnormalized));
433 EXPECT_TRUE(tex.has_tex_flag(TexInstr::y_unnormalized));
434 EXPECT_FALSE(tex.has_tex_flag(TexInstr::z_unnormalized));
435 EXPECT_FALSE(tex.has_tex_flag(TexInstr::w_unnormalized));
436
437 tex.set_tex_flag(TexInstr::z_unnormalized);
438 tex.set_tex_flag(TexInstr::w_unnormalized);
439 EXPECT_TRUE(tex.has_tex_flag(TexInstr::x_unnormalized));
440 EXPECT_TRUE(tex.has_tex_flag(TexInstr::y_unnormalized));
441 EXPECT_TRUE(tex.has_tex_flag(TexInstr::z_unnormalized));
442 EXPECT_TRUE(tex.has_tex_flag(TexInstr::w_unnormalized));
443
444 EXPECT_EQ(tex.inst_mode(), 0);
445
446 EXPECT_FALSE(tex.sampler_offset());
447
448 tex.set_dest_swizzle({4, 7, 0, 1});
449 EXPECT_EQ(tex.dest_swizzle(0), 4);
450 EXPECT_EQ(tex.dest_swizzle(1), 7);
451 EXPECT_EQ(tex.dest_swizzle(2), 0);
452 EXPECT_EQ(tex.dest_swizzle(3), 1);
453
454 tex.set_dest_swizzle({7, 2, 5, 0});
455 EXPECT_EQ(tex.dest_swizzle(0), 7);
456 EXPECT_EQ(tex.dest_swizzle(1), 2);
457 EXPECT_EQ(tex.dest_swizzle(2), 5);
458 EXPECT_EQ(tex.dest_swizzle(3), 0);
459
460 tex.set_offset(0, 2);
461 tex.set_offset(1, -1);
462 tex.set_offset(2, 3);
463
464 EXPECT_EQ(tex.get_offset(0), 4);
465 EXPECT_EQ(tex.get_offset(1), -2);
466 EXPECT_EQ(tex.get_offset(2), 6);
467
468 }
469
TEST_F(InstrTest,test_tex_gather4)470 TEST_F(InstrTest, test_tex_gather4)
471 {
472 TexInstr tex(TexInstr::gather4,
473 RegisterVec4(131),
474 {0,1,2,3},
475 RegisterVec4(132),
476 2,
477 19);
478
479 EXPECT_EQ(tex.opcode(), TexInstr::gather4);
480
481 auto& dst = tex.dst();
482 auto& src = tex.src();
483
484 for (int i = 0; i < 4; ++i) {
485 EXPECT_EQ(*dst[i], Register(131, i, pin_group));
486 EXPECT_EQ(*src[i], Register(132, i, pin_group));
487 EXPECT_EQ(tex.dest_swizzle(i), i);
488 }
489
490 EXPECT_EQ(tex.sampler_id(), 2);
491 EXPECT_EQ(tex.resource_id(), 19);
492
493 for (int i = 0; i < 3; ++i)
494 EXPECT_EQ(tex.get_offset(i), 0);
495
496 EXPECT_FALSE(tex.has_tex_flag(TexInstr::x_unnormalized));
497 EXPECT_FALSE(tex.has_tex_flag(TexInstr::y_unnormalized));
498 EXPECT_FALSE(tex.has_tex_flag(TexInstr::z_unnormalized));
499 EXPECT_FALSE(tex.has_tex_flag(TexInstr::w_unnormalized));
500
501 tex.set_gather_comp(2);
502 EXPECT_EQ(tex.inst_mode(), 2);
503
504 }
505
TEST_F(InstrTest,test_tex_neq)506 TEST_F(InstrTest, test_tex_neq)
507 {
508 TexInstr tex_ref(TexInstr::sample,
509 RegisterVec4(129),
510 {0,1,2,3},
511 RegisterVec4(130),
512 1,
513 17);
514 EXPECT_EQ(tex_ref, tex_ref);
515
516
517 EXPECT_NE(tex_ref, TexInstr(TexInstr::sample_c, RegisterVec4(129), {0,1,2,3}, RegisterVec4(130), 1, 17));
518 EXPECT_NE(tex_ref, TexInstr(TexInstr::sample, RegisterVec4(130), {0,1,2,3}, RegisterVec4(130), 1, 17));
519 EXPECT_NE(tex_ref, TexInstr(TexInstr::sample, RegisterVec4(130), {0,1,2,3}, RegisterVec4(130), 1, 17));
520
521 EXPECT_NE(tex_ref, TexInstr(TexInstr::sample, RegisterVec4(129), {7,1,2,3}, RegisterVec4(130), 1, 17));
522 EXPECT_NE(tex_ref, TexInstr(TexInstr::sample, RegisterVec4(129), {0,7,2,3}, RegisterVec4(130), 1, 17));
523 EXPECT_NE(tex_ref, TexInstr(TexInstr::sample, RegisterVec4(129), {0,1,7,3}, RegisterVec4(130), 1, 17));
524 EXPECT_NE(tex_ref, TexInstr(TexInstr::sample, RegisterVec4(129), {0,1,2,7}, RegisterVec4(130), 1, 17));
525
526 EXPECT_NE(tex_ref, TexInstr(TexInstr::sample, RegisterVec4(129), {0,1,2,3}, RegisterVec4(130, false, {7,1,2,3}), 1, 17));
527 EXPECT_NE(tex_ref, TexInstr(TexInstr::sample, RegisterVec4(129), {0,1,2,3}, RegisterVec4(130, false, {0,7,2,3}), 1, 17));
528 EXPECT_NE(tex_ref, TexInstr(TexInstr::sample, RegisterVec4(129), {0,1,2,3}, RegisterVec4(130, false, {0,1,7,3}), 1, 17));
529 EXPECT_NE(tex_ref, TexInstr(TexInstr::sample, RegisterVec4(129), {0,1,2,3}, RegisterVec4(130, false, {0,1,2,7}), 1, 17));
530
531 EXPECT_NE(tex_ref, TexInstr(TexInstr::sample, RegisterVec4(129), {0,1,2,3}, RegisterVec4(130), 2, 17));
532 EXPECT_NE(tex_ref, TexInstr(TexInstr::sample, RegisterVec4(129), {0,1,2,3}, RegisterVec4(130), 1, 18));
533
534 /*
535 auto tex_with_sampler_offset = tex_ref;
536 tex_with_sampler_offset.set_sampler_offset(new LiteralConstant( 2));
537 EXPECT_NE(tex_ref, tex_with_sampler_offset);
538
539 auto tex_cmp1 = tex_ref;
540 EXPECT_EQ(tex_ref, tex_cmp1);
541
542 tex_cmp1.set_tex_flag(TexInstr::x_unnormalized); EXPECT_NE(tex_ref, tex_cmp1);
543 auto tex_cmp2 = tex_ref; tex_cmp2.set_tex_flag(TexInstr::y_unnormalized); EXPECT_NE(tex_ref, tex_cmp2);
544 auto tex_cmp3 = tex_ref; tex_cmp3.set_tex_flag(TexInstr::z_unnormalized); EXPECT_NE(tex_ref, tex_cmp3);
545 auto tex_cmp4 = tex_ref; tex_cmp4.set_tex_flag(TexInstr::w_unnormalized); EXPECT_NE(tex_ref, tex_cmp4);
546
547 for (int i = 0; i < 3; ++i) {
548 auto tex_ofs = tex_ref;
549 tex_ofs.set_offset(i, 1);
550 EXPECT_NE(tex_ref, tex_ofs);
551 }
552
553 for (int i = 0; i < 4; ++i) {
554 auto tex_swz = tex_ref;
555 RegisterVec4::Swizzle dst_swz = {0,1,2,3};
556 dst_swz[i] = 7;
557 tex_swz.set_dest_swizzle(dst_swz);
558 EXPECT_NE(tex_ref, tex_swz);
559 }
560
561 auto tex_cmp_mode = tex_ref;
562 tex_cmp_mode.set_inst_mode(1);
563 EXPECT_NE(tex_ref, tex_cmp_mode);*/
564 }
565
566
TEST_F(InstrTest,test_export_basic)567 TEST_F(InstrTest, test_export_basic)
568 {
569 ExportInstr exp0(ExportInstr::param, 60, RegisterVec4(200));
570
571 EXPECT_EQ(exp0.export_type(), ExportInstr::param);
572 EXPECT_EQ(exp0.location(), 60);
573 EXPECT_EQ(exp0.value(), RegisterVec4(200));
574 EXPECT_FALSE(exp0.is_last_export());
575
576 ExportInstr exp1(ExportInstr::param, 60, RegisterVec4(200));
577 exp1.set_is_last_export(true);
578 EXPECT_TRUE(exp1.is_last_export());
579
580 EXPECT_EQ(exp0, exp0);
581 EXPECT_NE(exp0, exp1);
582
583 ExportInstr exp2(ExportInstr::pos, 60, RegisterVec4(200));
584 EXPECT_EQ(exp2.export_type(), ExportInstr::pos);
585 EXPECT_NE(exp0, exp2);
586
587 ExportInstr exp3(ExportInstr::param, 61, RegisterVec4(200));
588 EXPECT_EQ(exp3.location(), 61);
589 EXPECT_NE(exp0, exp3);
590
591 ExportInstr exp4(ExportInstr::param, 60, RegisterVec4(201));
592 EXPECT_EQ(exp4.value(), RegisterVec4(201));
593 EXPECT_NE(exp0, exp4);
594
595 EXPECT_NE(exp0, ExportInstr(ExportInstr::param, 60, RegisterVec4(200, false, {7,1,2,3})));
596 EXPECT_NE(exp0, ExportInstr(ExportInstr::param, 60, RegisterVec4(200, false, {0,7,2,3})));
597 EXPECT_NE(exp0, ExportInstr(ExportInstr::param, 60, RegisterVec4(200, false, {0,1,7,3})));
598 EXPECT_NE(exp0, ExportInstr(ExportInstr::param, 60, RegisterVec4(200, false, {0,1,2,7})));
599 }
600
601
TEST_F(InstrTest,test_fetch_basic)602 TEST_F(InstrTest, test_fetch_basic)
603 {
604 FetchInstr fetch(vc_fetch,
605 RegisterVec4(200),
606 {0,2,1,3},
607 new Register( 201, 2, pin_none),
608 0,
609 vertex_data,
610 fmt_8,
611 vtx_nf_norm,
612 vtx_es_none,
613 1,
614 nullptr);
615
616
617
618 EXPECT_EQ(fetch.opcode(), vc_fetch);
619 EXPECT_EQ(fetch.dst(), RegisterVec4(200));
620 EXPECT_EQ(fetch.dest_swizzle(0), 0);
621 EXPECT_EQ(fetch.dest_swizzle(1), 2);
622 EXPECT_EQ(fetch.dest_swizzle(2), 1);
623 EXPECT_EQ(fetch.dest_swizzle(3), 3);
624
625 EXPECT_EQ(fetch.src(), Register(201, 2, pin_none));
626 EXPECT_EQ(fetch.src_offset(), 0);
627
628 EXPECT_EQ(fetch.resource_id(), 1);
629 EXPECT_FALSE(fetch.resource_offset());
630
631 EXPECT_EQ(fetch.fetch_type(), vertex_data);
632 EXPECT_EQ(fetch.data_format(), fmt_8);
633 EXPECT_EQ(fetch.num_format(), vtx_nf_norm);
634 EXPECT_EQ(fetch.endian_swap(), vtx_es_none);
635
636 EXPECT_EQ(fetch.mega_fetch_count(), 0);
637 EXPECT_EQ(fetch.array_base(), 0);
638 EXPECT_EQ(fetch.array_size(), 0);
639 EXPECT_EQ(fetch.elm_size(), 0);
640
641 for (int i = 0; i < FetchInstr::unknown; ++i) {
642 EXPECT_FALSE(fetch.has_fetch_flag(static_cast<FetchInstr::EFlags>(i)));
643 }
644
645 EXPECT_NE(fetch, FetchInstr(vc_get_buf_resinfo, RegisterVec4(200),{0,2,1,3},
646 new Register( 201, 2, pin_none),
647 0, vertex_data,
648 fmt_8, vtx_nf_norm, vtx_es_none, 1, nullptr));
649
650 EXPECT_NE(fetch, FetchInstr(vc_fetch, RegisterVec4(201),{0,2,1,3},
651 new Register( 201, 2, pin_none),
652 0, vertex_data,
653 fmt_8, vtx_nf_norm, vtx_es_none,
654 1, nullptr));
655
656
657 EXPECT_NE(fetch, FetchInstr(vc_fetch, RegisterVec4(200),{1,2,0,3},
658 new Register( 201, 2, pin_none),
659 0, vertex_data,
660 fmt_8, vtx_nf_norm, vtx_es_none,
661 1, nullptr));
662
663
664 EXPECT_NE(fetch, FetchInstr(vc_fetch, RegisterVec4(200),{0,2,1,3},
665 new Register( 200, 2, pin_none),
666 0, vertex_data,
667 fmt_8, vtx_nf_norm, vtx_es_none,
668 1, nullptr));
669
670 EXPECT_NE(fetch, FetchInstr(vc_fetch, RegisterVec4(200),{0,2,1,3},
671 new Register( 201, 2, pin_none),
672 8, vertex_data,
673 fmt_8, vtx_nf_norm, vtx_es_none,
674 1, nullptr));
675
676
677 EXPECT_NE(fetch, FetchInstr(vc_fetch, RegisterVec4(200),{0,2,1,3},
678 new Register( 201, 2, pin_none),
679 0, instance_data,
680 fmt_8, vtx_nf_norm, vtx_es_none,
681 1, nullptr));
682
683
684 EXPECT_NE(fetch, FetchInstr(vc_fetch, RegisterVec4(200),{0,2,1,3},
685 new Register( 201, 2, pin_none),
686 0, vertex_data,
687 fmt_8_8, vtx_nf_norm, vtx_es_none,
688 1, nullptr));
689
690 EXPECT_NE(fetch, FetchInstr(vc_fetch, RegisterVec4(200),{0,2,1,3},
691 new Register( 201, 2, pin_none),
692 0, vertex_data,
693 fmt_8, vtx_nf_int, vtx_es_none,
694 1, nullptr));
695
696 EXPECT_NE(fetch, FetchInstr(vc_fetch, RegisterVec4(200),{0,2,1,3},
697 new Register( 201, 2, pin_none),
698 0, vertex_data,
699 fmt_8, vtx_nf_norm, vtx_es_8in16,
700 1, nullptr));
701
702 EXPECT_NE(fetch, FetchInstr(vc_fetch, RegisterVec4(200),{0,2,1,3},
703 new Register( 201, 2, pin_none),
704 0, vertex_data,
705 fmt_8, vtx_nf_norm, vtx_es_none,
706 2, nullptr));
707
708 EXPECT_NE(fetch, FetchInstr(vc_fetch, RegisterVec4(200),{0,2,1,3},
709 new Register( 201, 2, pin_none),
710 0, vertex_data,
711 fmt_8, vtx_nf_norm, vtx_es_none,
712 1, new Register( 1000, 0, pin_none)));
713
714 auto fetch1 = fetch;
715 fetch1.set_mfc(31);
716 EXPECT_NE(fetch1, fetch);
717 EXPECT_EQ(fetch1.mega_fetch_count(), 31);
718 EXPECT_TRUE(fetch1.has_fetch_flag(static_cast<FetchInstr::EFlags>(FetchInstr::is_mega_fetch)));
719
720 auto fetch2 = fetch;
721 fetch2.set_array_base(32);
722 EXPECT_NE(fetch, fetch2);
723 EXPECT_EQ(fetch2.array_base(), 32);
724
725 auto fetch3 = fetch;
726 fetch3.set_array_size(16);
727 EXPECT_NE(fetch, fetch3);
728 EXPECT_EQ(fetch3.array_size(), 16);
729
730 auto fetch4 = fetch;
731 fetch4.set_element_size(3);
732 EXPECT_NE(fetch, fetch4);
733 EXPECT_EQ(fetch4.elm_size(), 3);
734 }
735
TEST_F(InstrTest,test_fetch_basic2)736 TEST_F(InstrTest, test_fetch_basic2)
737 {
738 FetchInstr fetch(vc_get_buf_resinfo,
739 RegisterVec4(201),
740 {0,1,3,4},
741 new Register( 202, 3, pin_none),
742 1,
743 no_index_offset,
744 fmt_32_32,
745 vtx_nf_int,
746 vtx_es_8in16,
747 3,
748 new Register( 300, 1, pin_none));
749
750
751 EXPECT_EQ(fetch.opcode(), vc_get_buf_resinfo);
752 EXPECT_EQ(fetch.dst(), RegisterVec4(201));
753 EXPECT_EQ(fetch.dest_swizzle(0), 0);
754 EXPECT_EQ(fetch.dest_swizzle(1), 1);
755 EXPECT_EQ(fetch.dest_swizzle(2), 3);
756 EXPECT_EQ(fetch.dest_swizzle(3), 4);
757
758 EXPECT_EQ(fetch.src(), Register(202, 3, pin_none));
759 EXPECT_EQ(fetch.src_offset(), 1);
760
761 EXPECT_EQ(fetch.resource_id(), 3);
762 EXPECT_EQ(*fetch.resource_offset(), Register(300, 1, pin_none));
763
764 EXPECT_EQ(fetch.fetch_type(), no_index_offset);
765 EXPECT_EQ(fetch.data_format(), fmt_32_32);
766 EXPECT_EQ(fetch.num_format(), vtx_nf_int);
767 EXPECT_EQ(fetch.endian_swap(), vtx_es_8in16);
768
769 EXPECT_EQ(fetch.mega_fetch_count(), 0);
770 EXPECT_EQ(fetch.array_base(), 0);
771 EXPECT_EQ(fetch.array_size(), 0);
772 EXPECT_EQ(fetch.elm_size(), 0);
773
774 for (int i = 0; i < FetchInstr::unknown; ++i) {
775 EXPECT_FALSE(fetch.has_fetch_flag(static_cast<FetchInstr::EFlags>(i)));
776 }
777
778 auto fetch1 = fetch;
779 fetch1.set_mfc(15);
780 EXPECT_NE(fetch1, fetch);
781 EXPECT_EQ(fetch1.mega_fetch_count(), 15);
782 EXPECT_TRUE(fetch1.has_fetch_flag(static_cast<FetchInstr::EFlags>(FetchInstr::is_mega_fetch)));
783
784 auto fetch2 = fetch;
785 fetch2.set_array_base(128);
786 EXPECT_NE(fetch, fetch2);
787 EXPECT_EQ(fetch2.array_base(), 128);
788
789 auto fetch3 = fetch;
790 fetch3.set_array_size(8);
791 EXPECT_NE(fetch, fetch3);
792 EXPECT_EQ(fetch3.array_size(), 8);
793
794 auto fetch4 = fetch;
795 fetch4.set_element_size(1);
796 EXPECT_NE(fetch, fetch4);
797 EXPECT_EQ(fetch4.elm_size(), 1);
798 }
799