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Searched refs:v3d_qpu_mul_op_num_src (Results 1 – 6 of 6) sorted by relevance

/third_party/mesa3d/src/broadcom/compiler/
Dqpu_schedule.c311 if (v3d_qpu_mul_op_num_src(inst->alu.mul.op) > 0) in calculate_deps()
313 if (v3d_qpu_mul_op_num_src(inst->alu.mul.op) > 1) in calculate_deps()
546 if (v3d_qpu_mul_op_num_src(inst->alu.mul.op) > 0 && in reads_too_soon_after_write()
550 if (v3d_qpu_mul_op_num_src(inst->alu.mul.op) > 1 && in reads_too_soon_after_write()
850 v3d_qpu_mul_op_num_src(mul_instr->alu.mul.op) > 1) { in qpu_merge_raddrs()
874 v3d_qpu_mul_op_num_src(mul_instr->alu.mul.op) > 1) { in qpu_merge_raddrs()
2008 num_src = v3d_qpu_mul_op_num_src(inst->alu.mul.op); in alu_reads_register()
Dvir.c40 return v3d_qpu_mul_op_num_src(inst->qpu.alu.mul.op); in vir_get_nsrc()
/third_party/mesa3d/src/broadcom/qpu/
Dqpu_instr.c499 v3d_qpu_mul_op_num_src(enum v3d_qpu_mul_op op) in v3d_qpu_mul_op_num_src() function
895 int mul_nsrc = v3d_qpu_mul_op_num_src(inst->alu.mul.op); in v3d_qpu_uses_mux()
Dqpu_instr.h409 int v3d_qpu_mul_op_num_src(enum v3d_qpu_mul_op op);
Dqpu_disasm.c142 int num_src = v3d_qpu_mul_op_num_src(instr->alu.mul.op); in v3d_qpu_disasm_mul()
Dqpu_pack.c1206 int nsrc = v3d_qpu_mul_op_num_src(instr->alu.mul.op); in v3d_qpu_mul_pack()