| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | sdma_v2_4.c | 343 u32 rb_cntl, ib_cntl; in sdma_v2_4_gfx_stop() local
354 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v2_4_gfx_stop()
355 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v2_4_gfx_stop()
356 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v2_4_gfx_stop()
411 u32 rb_cntl, ib_cntl; in sdma_v2_4_gfx_resume() local
470 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v2_4_gfx_resume()
471 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v2_4_gfx_resume()
473 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v2_4_gfx_resume()
476 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v2_4_gfx_resume()
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| D | sdma_v4_0.c | 960 u32 rb_cntl, ib_cntl; in sdma_v4_0_gfx_stop() local
974 ib_cntl = RREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL); in sdma_v4_0_gfx_stop()
975 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v4_0_gfx_stop()
976 WREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL, ib_cntl); in sdma_v4_0_gfx_stop()
1002 u32 rb_cntl, ib_cntl; in sdma_v4_0_page_stop() local
1019 ib_cntl = RREG32_SDMA(i, mmSDMA0_PAGE_IB_CNTL); in sdma_v4_0_page_stop()
1020 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_PAGE_IB_CNTL, in sdma_v4_0_page_stop()
1022 WREG32_SDMA(i, mmSDMA0_PAGE_IB_CNTL, ib_cntl); in sdma_v4_0_page_stop()
1142 u32 rb_cntl, ib_cntl, wptr_poll_cntl; in sdma_v4_0_gfx_resume() local
1209 ib_cntl = RREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL); in sdma_v4_0_gfx_resume()
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| D | sdma_v3_0.c | 517 u32 rb_cntl, ib_cntl; in sdma_v3_0_gfx_stop() local
528 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v3_0_gfx_stop()
529 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v3_0_gfx_stop()
530 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v3_0_gfx_stop()
646 u32 rb_cntl, ib_cntl, wptr_poll_cntl; in sdma_v3_0_gfx_resume() local
738 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v3_0_gfx_resume()
739 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v3_0_gfx_resume()
741 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v3_0_gfx_resume()
744 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v3_0_gfx_resume()
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| D | sdma_v5_2.c | 462 u32 rb_cntl, ib_cntl; in sdma_v5_2_gfx_stop() local
475 ib_cntl = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_2_gfx_stop()
476 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v5_2_gfx_stop()
477 WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_2_gfx_stop()
583 u32 rb_cntl, ib_cntl; in sdma_v5_2_gfx_resume() local
708 ib_cntl = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_2_gfx_resume()
709 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v5_2_gfx_resume()
711 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v5_2_gfx_resume()
714 WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_2_gfx_resume()
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| D | sdma_v5_0.c | 526 u32 rb_cntl, ib_cntl; in sdma_v5_0_gfx_stop() local
537 ib_cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_0_gfx_stop()
538 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v5_0_gfx_stop()
539 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_0_gfx_stop()
652 u32 rb_cntl, ib_cntl; in sdma_v5_0_gfx_resume() local
777 ib_cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_0_gfx_resume()
778 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v5_0_gfx_resume()
780 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v5_0_gfx_resume()
783 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_0_gfx_resume()
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| D | si_dma.c | 133 u32 rb_cntl, dma_cntl, ib_cntl, rb_bufsz; in si_dma_start() local
165 ib_cntl = DMA_IB_ENABLE | CMD_VMID_FORCE; in si_dma_start()
167 ib_cntl |= DMA_IB_SWAP_ENABLE; in si_dma_start()
169 WREG32(DMA_IB_CNTL + sdma_offsets[i], ib_cntl); in si_dma_start()
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| D | cik_sdma.c | 433 u32 rb_cntl, ib_cntl; in cik_sdma_gfx_resume() local
492 ib_cntl = SDMA0_GFX_IB_CNTL__IB_ENABLE_MASK; in cik_sdma_gfx_resume()
494 ib_cntl |= SDMA0_GFX_IB_CNTL__IB_SWAP_ENABLE_MASK; in cik_sdma_gfx_resume()
497 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in cik_sdma_gfx_resume()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| D | r600_dma.c | 123 u32 rb_cntl, dma_cntl, ib_cntl; in r600_dma_resume() local
154 ib_cntl = DMA_IB_ENABLE; in r600_dma_resume()
156 ib_cntl |= DMA_IB_SWAP_ENABLE; in r600_dma_resume()
158 WREG32(DMA_IB_CNTL, ib_cntl); in r600_dma_resume()
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| D | ni_dma.c | 190 u32 rb_cntl, dma_cntl, ib_cntl; in cayman_dma_resume() local
233 ib_cntl = DMA_IB_ENABLE | CMD_VMID_FORCE; in cayman_dma_resume()
235 ib_cntl |= DMA_IB_SWAP_ENABLE; in cayman_dma_resume()
237 WREG32(DMA_IB_CNTL + reg_offset, ib_cntl); in cayman_dma_resume()
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| D | cik_sdma.c | 368 u32 rb_cntl, ib_cntl; in cik_sdma_gfx_resume() local
417 ib_cntl = SDMA_IB_ENABLE; in cik_sdma_gfx_resume()
419 ib_cntl |= SDMA_IB_SWAP_ENABLE; in cik_sdma_gfx_resume()
422 WREG32(SDMA0_GFX_IB_CNTL + reg_offset, ib_cntl); in cik_sdma_gfx_resume()
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