| /third_party/mesa3d/src/amd/compiler/ |
| D | aco_opcodes.py | 385 for (gfx6, gfx7, gfx8, gfx9, gfx10, name, cls) in default_class(SOP2, InstrClass.Salu):
386 opcode(name, gfx7, gfx9, gfx10, Format.SOP2, cls)
421 for (gfx6, gfx7, gfx8, gfx9, gfx10, name, cls) in default_class(SOPK, InstrClass.Salu):
422 opcode(name, gfx7, gfx9, gfx10, Format.SOPK, cls)
499 for (gfx6, gfx7, gfx8, gfx9, gfx10, name, cls) in default_class(SOP1, InstrClass.Salu):
500 opcode(name, gfx7, gfx9, gfx10, Format.SOP1, cls)
527 for (gfx6, gfx7, gfx8, gfx9, gfx10, name) in SOPC:
528 opcode(name, gfx7, gfx9, gfx10, Format.SOPC, InstrClass.Salu)
574 for (gfx6, gfx7, gfx8, gfx9, gfx10, name, cls) in default_class(SOPP, InstrClass.Salu):
575 opcode(name, gfx7, gfx9, gfx10, Format.SOPP, cls)
[all …]
|
| /third_party/mesa3d/src/intel/vulkan/ |
| D | gfx7_cmd_buffer.c | 104 anv_batch_emit_merge(&cmd_buffer->batch, sf_dw, pipeline->gfx7.sf); in genX()
245 anv_batch_emit_merge(&cmd_buffer->batch, dwords, pipeline->gfx7.wm); in genX()
298 pipeline->gfx7.blend_state, num_dwords, 64); in genX()
|
| D | genX_pipeline.c | 858 GENX(3DSTATE_SF_pack)(NULL, &pipeline->gfx7.sf, &sf); in emit_rs_state()
1023 pipeline->gfx8.blend_state : pipeline->gfx7.blend_state; in emit_cb_state()
1249 GENX(3DSTATE_CLIP_pack)(NULL, pipeline->gfx7.clip, &clip); in emit_3dstate_clip()
1392 # define streamout_state_dw pipeline->gfx7.streamout_state in emit_3dstate_streamout()
1426 pipeline->gfx7.xfb_bo_pitch[0] = xfb_info->buffers[0].stride; in emit_3dstate_streamout()
1427 pipeline->gfx7.xfb_bo_pitch[1] = xfb_info->buffers[1].stride; in emit_3dstate_streamout()
1428 pipeline->gfx7.xfb_bo_pitch[2] = xfb_info->buffers[2].stride; in emit_3dstate_streamout()
1429 pipeline->gfx7.xfb_bo_pitch[3] = xfb_info->buffers[3].stride; in emit_3dstate_streamout()
1909 uint32_t *dws = devinfo->ver >= 8 ? pipeline->gfx8.wm : pipeline->gfx7.wm; in emit_3dstate_wm()
|
| D | meson.build | 28 '--device-prefix', 'gfx7', '--device-prefix', 'gfx75',
|
| D | genX_cmd_buffer.c | 3539 pipeline->gfx7.clip); in cmd_buffer_emit_clip()
3778 # define streamout_state_dw pipeline->gfx7.streamout_state in cmd_buffer_emit_streamout()
3941 sob.SurfacePitch = pipeline->gfx7.xfb_bo_pitch[idx]; in genX()
|
| D | anv_private.h | 3168 } gfx7; member
|
| /third_party/mesa3d/src/intel/tools/ |
| D | meson.build | 207 ['ivb', 'gfx7'],
208 ['hsw', 'gfx7.5'],
|
| /third_party/mesa3d/src/intel/common/ |
| D | meson.build | 113 foreach g : [['70', 'gfx7'], ['75', 'hsw'], ['80', 'gfx8'],
|
| /third_party/mesa3d/src/amd/common/ |
| D | meson.build | 24 '../registers/gfx7.json',
|
| /third_party/mesa3d/docs/relnotes/ |
| D | 21.0.2.rst | 98 - radeonsi: disable sparse buffers on gfx7-8
|
| D | 21.1.5.rst | 103 - radeonsi/gfx7: always sync pfp/me
|
| D | 22.2.0.rst | 3561 - anv: use shadow surface for stencil input attachment on gfx7
3620 - anv: don't expose EXT_border_color_swizzle on gfx7
3645 - anv: add a comment about handling buffer view swizzles on gfx7
3661 - anv: fix primitive topology dynamic state emission on gfx7
4012 - radeonsi: increase the max compute LDS size to 64KB for gfx7+
|
| D | 21.3.0.rst | 2210 - intel/gfx7: Change GPGPU Mode to bool
3481 - radeonsi: implement si_sdma_copy_image for gfx7+
|
| D | 21.2.0.rst | 3533 - radeonsi: drop gfx7 support from the prim discard CS to simplify code
4348 - radeonsi/gfx7: always sync pfp/me
|
| D | 21.1.0.rst | 3281 - radeonsi: rearrange condition for streamout workaround on gfx7 and gfx8
3545 - radeonsi: disable sparse buffers on gfx7-8
|
| D | 20.0.0.rst | 831 - aco: handle gfx7 int8/10 clamping on exports
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPU.td | 257 def FeatureGFX7GFX8GFX9Insts : SubtargetFeature<"gfx7-gfx8-gfx9-insts",
|
| /third_party/mesa3d/docs/ |
| D | features.txt | 470 VK_EXT_scalar_block_layout DONE (anv, lvp, radv/gfx7+, tu, vn)
|
| /third_party/mesa3d/ohos/ |
| D | dependency_inputs.gni | 443 "../src/amd/registers/gfx7.json",
|