1 /*
2 * Copyright (c) 2021 HiSilicon (Shanghai) Technologies CO., LIMITED.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15
16 #include "hieth_mac.h"
17 #include "ctrl.h"
18
HiethMacCoreInit(void)19 void HiethMacCoreInit(void)
20 {
21 uint32_t v;
22
23 READ_UINT32(v, HIETH_CRG_IOBASE);
24 v |= ETH_CORE_CLK_SELECT_54M;
25 v |= (0x1 << 1); /* enable clk */
26 WRITE_UINT32(v, HIETH_CRG_IOBASE);
27
28 /* set reset bit */
29 READ_UINT32(v, HIETH_CRG_IOBASE);
30 v |= 0x1;
31 WRITE_UINT32(v, HIETH_CRG_IOBASE);
32
33 LOS_Udelay(DELAY_TIME_MEDIUM);
34
35 /* clear reset bit */
36 READ_UINT32(v, HIETH_CRG_IOBASE);
37 v &= ~(0x1);
38 WRITE_UINT32(v, HIETH_CRG_IOBASE);
39 }
40
HiethPortReset(struct EthDevice * ethDevice)41 int32_t HiethPortReset(struct EthDevice *ethDevice)
42 {
43 struct HiethNetdevLocal *ld = GetHiethNetDevLocal(ethDevice);
44 if (ld == NULL) {
45 HDF_LOGE("%s: get ld fail!", __func__);
46 return HDF_FAILURE;
47 }
48
49 /* soft reset: sf ip need reset twice */
50 if (ld->port == UP_PORT) {
51 /* Note: sf ip need reset twice */
52 HiethWritelBits(ld, 1, GLB_SOFT_RESET, BITS_ETH_SOFT_RESET_ALL);
53 msleep(1);
54 HiethWritelBits(ld, 0, GLB_SOFT_RESET, BITS_ETH_SOFT_RESET_ALL);
55 msleep(1);
56 HiethWritelBits(ld, 1, GLB_SOFT_RESET, BITS_ETH_SOFT_RESET_ALL);
57 msleep(1);
58 HiethWritelBits(ld, 0, GLB_SOFT_RESET, BITS_ETH_SOFT_RESET_ALL);
59 } else if (ld->port == DOWN_PORT) {
60 /* Note: sf ip need reset twice */
61 HiethWritelBits(ld, 1, GLB_SOFT_RESET, BITS_ETH_SOFT_RESET_DOWN);
62 msleep(1);
63 HiethWritelBits(ld, 0, GLB_SOFT_RESET, BITS_ETH_SOFT_RESET_DOWN);
64 msleep(1);
65 HiethWritelBits(ld, 1, GLB_SOFT_RESET, BITS_ETH_SOFT_RESET_DOWN);
66 msleep(1);
67 HiethWritelBits(ld, 0, GLB_SOFT_RESET, BITS_ETH_SOFT_RESET_DOWN);
68 }
69 return HDF_SUCCESS;
70 }
71
HiethPortInit(struct EthDevice * ethDevice)72 int32_t HiethPortInit(struct EthDevice *ethDevice)
73 {
74 struct HiethNetdevLocal *ld = GetHiethNetDevLocal(ethDevice);
75 if (ld == NULL) {
76 HDF_LOGE("%s: get ld fail!", __func__);
77 return HDF_FAILURE;
78 }
79
80 HiethSetEndianMode(ld, HIETH_LITTLE_ENDIAN);
81 HiethSetLinkStat(ld, 0);
82 HiethSetNegMode(ld, HIETH_NEGMODE_CPUSET);
83 /* clear all interrupt status */
84 HiethClearIrqstatus(ld, UD_BIT_NAME(BITS_IRQS_MASK));
85 /* disable interrupts */
86 HiethWritelBits(ld, 0, GLB_RW_IRQ_ENA, UD_BIT_NAME(BITS_IRQS_ENA));
87 HiethIrqDisable(ld, UD_BIT_NAME(BITS_IRQS_MASK));
88
89 #ifdef HIETH_TSO_SUPPORTED
90 /* enable TSO debug for error handle */
91 HiethWritelBits(ld, 1, UD_REG_NAME(GLB_TSO_DBG_EN), BITS_TSO_DBG_EN);
92 #endif
93
94 /* disable vlan func */
95 HiethWritelBits(ld, 0, GLB_FWCTRL, BITS_VLAN_ENABLE);
96 /* enable UpEther<->CPU */
97 HiethWritelBits(ld, 1, GLB_FWCTRL, UD_BIT(ld->port, BITS_FW2CPU_ENA));
98 HiethWritelBits(ld, 0, GLB_FWCTRL, UD_BIT(ld->port, BITS_FWALL2CPU));
99 HiethWritelBits(ld, 1, GLB_MACTCTRL, UD_BIT(ld->port, BITS_BROAD2CPU));
100 HiethWritelBits(ld, 1, GLB_MACTCTRL, UD_BIT(ld->port, BITS_MACT_ENA));
101 HiethWritelBits(ld, 1, GLB_MACTCTRL, UD_BIT(ld->port, BITS_MULTI2CPU));
102
103 HiethSetMacLeadcodeCntLimit(ld, 0);
104 HiethSetRcvLenMax(ld, HIETH_MAX_RCV_LEN);
105 RegisterHiethData(ethDevice);
106
107 return HDF_SUCCESS;
108 }
109
110 static struct EthMacOps g_macOps = {
111 .MacInit = HiethMacCoreInit,
112 .PortReset = HiethPortReset,
113 .PortInit = HiethPortInit,
114 };
115
BuildHisiMacDriver(void)116 struct HdfEthMacChipDriver *BuildHisiMacDriver(void)
117 {
118 struct HdfEthMacChipDriver *macChipDriver = (struct HdfEthMacChipDriver *)OsalMemCalloc(
119 sizeof(struct HdfEthMacChipDriver));
120 if (macChipDriver == NULL) {
121 HDF_LOGE("%s fail: OsalMemCalloc fail!", __func__);
122 return NULL;
123 }
124 macChipDriver->ethMacOps = &g_macOps;
125 return macChipDriver;
126 }
127
ReleaseHisiMacDriver(struct HdfEthMacChipDriver * chipDriver)128 void ReleaseHisiMacDriver(struct HdfEthMacChipDriver *chipDriver)
129 {
130 if (chipDriver == NULL) {
131 return;
132 }
133 OsalMemFree(chipDriver);
134 }
135
GetEthMacChipDriver(const struct NetDevice * netDev)136 struct HdfEthMacChipDriver *GetEthMacChipDriver(const struct NetDevice *netDev)
137 {
138 struct HdfEthNetDeviceData *data = GetEthNetDeviceData(netDev);
139 if (data != NULL) {
140 return data->macChipDriver;
141 }
142 return NULL;
143 }
144