1 /******************************************************************************
2 * Copyright (c) 2023 Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
3 * All rights reserved.
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************/
18
19 #include <B91/clock.h>
20 #include "hdf_log_adapter_debug.h"
21 #include "uart_tlsr9518.h"
22
23 #define HZ_IN_MHZ (1000 * 1000)
24 #define MAX_BITS_PER_BYTE 12
25
26
parity_from_uattr(struct UartAttribute uattr)27 uart_parity_e parity_from_uattr(struct UartAttribute uattr)
28 {
29 uart_parity_e parity;
30
31 switch (uattr.parity) {
32 case UART_ATTR_PARITY_NONE:
33 parity = UART_PARITY_NONE;
34 break;
35
36 case UART_ATTR_PARITY_ODD:
37 parity = UART_PARITY_ODD;
38 break;
39
40 case UART_ATTR_PARITY_EVEN:
41 parity = UART_PARITY_EVEN;
42 break;
43
44 default:
45 parity = UART_PARITY_NONE;
46 break;
47 }
48
49 return parity;
50 }
51
52
stopbit_from_uattr(struct UartAttribute uattr)53 uart_stop_bit_e stopbit_from_uattr(struct UartAttribute uattr)
54 {
55 uart_stop_bit_e stopbit;
56
57 switch (uattr.stopBits) {
58 case UART_ATTR_STOPBIT_1:
59 stopbit = UART_STOP_BIT_ONE;
60 break;
61
62 case UART_ATTR_STOPBIT_1P5:
63 stopbit = UART_STOP_BIT_ONE_DOT_FIVE;
64 break;
65
66 case UART_ATTR_STOPBIT_2:
67 stopbit = UART_STOP_BIT_TWO;
68 break;
69
70 default:
71 stopbit = UART_STOP_BIT_ONE;
72 }
73
74 return stopbit;
75 }
76
77
uart_dma_init(uart_driver_data_t * driver_data)78 void uart_dma_init(uart_driver_data_t *driver_data)
79 {
80 uart_set_pin(driver_data->tx, driver_data->rx);
81
82 uart_reset(driver_data->port->num);
83
84 unsigned short div;
85 unsigned char bwpc;
86
87 uart_cal_div_and_bwpc(driver_data->baudrate, sys_clk.pclk * HZ_IN_MHZ, &div, &bwpc);
88 uart_init(driver_data->port->num, div, bwpc,
89 parity_from_uattr(driver_data->uattr),
90 stopbit_from_uattr(driver_data->uattr));
91 uart_set_dma_rx_timeout(driver_data->port->num, bwpc, MAX_BITS_PER_BYTE, UART_BW_MUL1);
92 uart_set_tx_dma_config(driver_data->port->num, DMA2);
93 dma_clr_irq_mask(DMA2, TC_MASK|ABT_MASK|ERR_MASK);
94 uart_clr_tx_done(driver_data->port->num);
95 }
96