Lines Matching refs:is

40 1. Bytecode is register-based: all arguments and variables are mapped to virtual registers,
42 1. There is a dedicated register called accumulator, which is addressed implicitly by some
44 1. Bytecode's instruction set architecture is machine-readable with a dedicated API for
51 Rationale on the machine-readable instruction set architecture is following. Since bytecode
52 is the main form of program representation, information about it is needed in many components of
54 a bunch of C/C++ headers is very fragile and error-prone. At the same time,
58 * Converter from bytecode to the compiler's intermediate representation is partially implemented
86    in the offset. Additionally, 4-byte alignment is enforced for the most of data structures for
99 Our aim is to address these issues by having a single file for application code. This, however,
127 1. Interpreter is stackless (from the host stack perspective): Whenever a call from managed code
128    to managed code is performed, no new host frame is created for the interpreter itself.
136     1. The "nativeness" of the language implementation to the platform. A language that is
142    more toolchains support C++ compilation for IoT, the standard library is often not present
143    on the device. Since static linking with a subset of the library is a pain and may not guarantee
144    optimal size of resulting native binary executable files, it is more reasonable to reimplement
146 1. According to our experiments, a stackless interpreter for a stack-based bytecode (which is by
148    bytecode (which is by nature faster).
170 1. The size of a virtual register is not hardcoded by design. Currently it is always 128 bits,
171    but this is an implementation detail which is hidden behind the interfaces
173 1. By default virtual stack is not mapped to a host stack, instead it is allocated on heap using
174    platform's memory management facilities. It is important that this behavior is not
181    redundant memory consumption is cheaper than ongoing runtime penalties on garbage collector
183 1. Where does 128 comes from? It is `128 = 64 + 64`. The first 64 is either `sizeof(long int)`
185    size of the payload we are required to store in a virtual register). The second 64 is for tag
186    and padding. A lot of free space is expected to be in the padding area. Probably we may use it
208 1. A light-weight Panda Assembly language is developed, along with the Panda Assembler tool.
209 1. A compliance test suite for the Panda Assembly language is created. The core part of the suite
212 1. A set of benchmarks is ported to Panda Assembly and maintained as a part of the source tree.
218 Lots of things are being created in parallel, and currently there is no stable front-end for Panda