Lines Matching full:pin
1 Samsung GPIO and Pin Mux/Config controller
3 Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
10 - "samsung,s3c2412-pinctrl": for S3C2412-compatible pin-controller,
11 - "samsung,s3c2416-pinctrl": for S3C2416-compatible pin-controller,
12 - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller,
13 - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller,
14 - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller,
15 - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller,
16 - "samsung,exynos3250-pinctrl": for Exynos3250 compatible pin-controller.
17 - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller.
18 - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller.
19 - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller.
20 - "samsung,exynos5260-pinctrl": for Exynos5260 compatible pin-controller.
21 - "samsung,exynos5410-pinctrl": for Exynos5410 compatible pin-controller.
22 - "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller.
23 - "samsung,exynos5433-pinctrl": for Exynos5433 compatible pin-controller.
24 - "samsung,exynos7-pinctrl": for Exynos7 compatible pin-controller.
26 - reg: Base address of the pin controller hardware module and length of
29 - reg: Second base address of the pin controller if the specific registers
30 of the pin controller are separated into the different base address.
47 - Pin banks as child nodes: Pin banks of the controller are represented by child
51 - gpio-controller: identifies the node as a gpio controller and pin bank.
58 [pin number within the gpio controller]
62 - Pin number: is a value between 0 to 7.
66 - Pin mux/config groups as child nodes: The pin mux (selecting pin function
67 mode) and pin config (pull up/down, driver strength) settings are represented
68 as child nodes of the pin-controller node. There should be at least one
75 The child node should contain a list of pin(s) on which a particular pin
76 function selection or pin configuration (or both) have to applied. This
78 should be at least one pin specified for this property and there is no upper
80 using pin names which are derived from the hardware manual of the SoC. As
81 an example, the pins in GPA0 bank of the pin controller can be represented
83 The format of the pin names should be (as per the hardware manual)
84 "[pin bank name]-[pin number within the bank]".
86 The pin function selection that should be applied on the pins listed in the
87 child node is specified using the "samsung,pin-function" property. The value
90 for the specified pin group. This property is optional in the child node if
92 node. The value of this property is used as-is to program the pin-controller
93 function selector register of the pin-bank.
95 The child node can also optionally specify one or more of the pin
97 "samsung,pins" property of the child node. The following pin configuration
100 - samsung,pin-val: Initial value of pin output buffer.
101 - samsung,pin-pud: Pull up/down configuration.
102 - samsung,pin-drv: Drive strength configuration.
103 - samsung,pin-pud-pdn: Pull up/down configuration in power down mode.
104 - samsung,pin-drv-pdn: Drive strength configuration in power down mode.
107 hardware manual and these values are programmed as-is into the pin
108 pull up/down and driver strength register of the pin-controller.
110 Note: A child should include at least a pin function selection property or
111 pin configuration property (one or more) or both.
113 The client nodes that require a particular pin function selection and/or
114 pin configuration should use the bindings listed in the "pinctrl-bindings.txt"
125 following properties should be specified in the pin-controller device node.
146 included in the pin-controller device node.
148 Only one pin-controller device node can include external wakeup interrupts
150 pin-controller is supported).
193 All the pin controller nodes should be represented in the aliases node using
197 - pinctrl0: pin controller of ALIVE block,
198 - pinctrl1: pin controller of BUS0 block,
199 - pinctrl2: pin controller of NFC block,
200 - pinctrl3: pin controller of TOUCH block,
201 - pinctrl4: pin controller of FF block,
202 - pinctrl5: pin controller of ESE block,
203 - pinctrl6: pin controller of FSYS0 block,
204 - pinctrl7: pin controller of FSYS1 block,
205 - pinctrl8: pin controller of BUS1 block,
206 - pinctrl9: pin controller of AUDIO block,
208 Example: A pin-controller node with pin banks:
217 /* Pin bank without external interrupts */
225 /* Pin bank with external GPIO or muxed wake-up interrupts */
236 /* Pin bank with external direct wake-up interrupts */
251 Example 1: A pin-controller node with pin groups.
264 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
265 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
266 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
271 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
272 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
273 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
278 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
279 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
280 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
285 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
286 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
287 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
292 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
293 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
294 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
301 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
302 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
303 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
308 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
309 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
310 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
315 Example 2: A pin-controller node with external wakeup interrupt controller node.
342 Example 4: Set up the default pin state for uart controller.