Lines Matching full:pwm
5 $id: http://devicetree.org/schemas/pwm/pwm-sifive.yaml#
8 title: SiFive PWM controller
16 Unlike most other PWM controllers, the SiFive PWM controller currently
17 only supports one period for all channels in the PWM. All PWMs need to
20 achievable period. PWM RTL that corresponds to the IP block version
23 https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm
28 - const: sifive,fu540-c000-pwm
31 Should be "sifive,<chip>-pwm" and "sifive,pwm<version>". Supported
32 compatible strings are "sifive,fu540-c000-pwm" for the SiFive PWM v0
34 SiFive PWM v0 IP block with no chip integration tweaks.
43 "#pwm-cells":
49 Each PWM instance in FU540-C000 has 4 comparators. One interrupt per comparator.
55 - "#pwm-cells"
62 pwm: pwm@10020000 {
63 compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
68 #pwm-cells = <3>;