Lines Matching +full:processor +full:- +full:intensive
1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The OMAP family of SoCs usually have one or more slave processor sub-systems
14 that are used to offload some of the processor-intensive tasks, or to manage
17 The processor cores in the sub-system are usually behind an IOMMU, and may
18 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2
21 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor
22 sub-system. The DSP processor sub-system can contain any of the TI's C64x,
23 C66x or C67x family of DSP cores as the main execution unit. The IPU processor
24 sub-system usually contains either a Dual-Core Cortex-M3 or Dual-Core
25 Cortex-M4 processors.
27 Each remote processor sub-system is represented as a single DT node. Each node
29 the host processor (MPU) to perform the device management of the remote
30 processor and to communicate with the remote processor. The various properties
36 image. Examples of variable properties include 'mboxes', 'memory-region',
37 'timers', 'watchdog-timers' etc.
42 - ti,omap4-dsp
43 - ti,omap5-dsp
44 - ti,dra7-dsp
45 - ti,omap4-ipu
46 - ti,omap5-ipu
47 - ti,dra7-ipu
54 for this remote processor to access any external RAM memory or
57 cases where the sub-system has different ports for different
58 sub-modules within the processor sub-system (eg: DRA7 DSPs),
65 OMAP Mailbox specifier denoting the sub-mailbox, to be used for
66 communication with the remote processor. The specifier format is
68 Documentation/devicetree/bindings/mailbox/omap-mailbox.txt
69 This property should match with the sub-mailbox node used in
74 Main functional clock for the remote processor
78 Reset handles for the remote processor
80 firmware-name:
82 Default name of the firmware to load to the remote processor.
85 # --------------------
88 # remote processor. The conditions are mentioned for each property.
92 memory-region:
99 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
105 'reg-names'. These are mandatory for all DSP and IPU
109 reg-names:
118 - const: l2ram
119 - const: l1pram
120 - const: l1dram
123 $ref: /schemas/types.yaml#/definitions/phandle-array
132 ti,autosuspend-delay-ms:
140 $ref: /schemas/types.yaml#/definitions/phandle-array
145 processor sub-system is running in SMP mode, or one per
146 core in the processor sub-system. This can also be used
155 ti,watchdog-timers:
156 $ref: /schemas/types.yaml#/definitions/phandle-array
159 serve as Watchdog timers for the processor cores. This
160 will usually be one per executing processor core, even
161 if the processor sub-system is running a SMP OS.
170 - ti,dra7-dsp
177 - reg
178 - reg-names
179 - ti,bootreg
186 - ti,omap4-ipu
187 - ti,omap5-ipu
188 - ti,dra7-ipu
196 - reg
197 - reg-names
203 - ti,bootreg
206 - compatible
207 - iommus
208 - mboxes
209 - clocks
210 - resets
211 - firmware-name
216 - |
221 #include <dt-bindings/clock/omap4.h>
222 reserved-memory {
223 #address-cells = <1>;
224 #size-cells = <1>;
226 dsp_memory_region: dsp-memory@98000000 {
227 compatible = "shared-dma-pool";
236 compatible = "ti,omap4-dsp";
240 memory-region = <&dsp_memory_region>;
242 ti,watchdog-timers = <&timer6>;
245 firmware-name = "omap4-dsp-fw.xe64T";
249 - |+
254 #include <dt-bindings/clock/omap5.h>
255 reserved-memory {
256 #address-cells = <2>;
257 #size-cells = <2>;
259 ipu_memory_region: ipu-memory@95800000 {
260 compatible = "shared-dma-pool";
268 #address-cells = <1>;
269 #size-cells = <1>;
272 compatible = "ti,omap5-ipu";
274 reg-names = "l2ram";
277 memory-region = <&ipu_memory_region>;
279 ti,watchdog-timers = <&timer9>, <&timer11>;
282 firmware-name = "omap5-ipu-fw.xem4";
286 - |+
291 #include <dt-bindings/clock/dra7.h>
292 reserved-memory {
293 #address-cells = <2>;
294 #size-cells = <2>;
296 dsp1_memory_region: dsp1-memory@99000000 {
297 compatible = "shared-dma-pool";
305 #address-cells = <1>;
306 #size-cells = <1>;
309 compatible = "ti,dra7-dsp";
313 reg-names = "l2ram", "l1pram", "l1dram";
317 memory-region = <&dsp1_memory_region>;
319 ti,watchdog-timers = <&timer10>;
322 firmware-name = "dra7-dsp1-fw.xe66";