Lines Matching refs:TM

168 For signals taken in non-TM or suspended mode, we use the
198 GDB and ptrace are not currently TM-aware.  If one stops during a transaction,
202 inaccessible.  GDB can currently be used on programs using TM, but not sensibly
208 TM on POWER9 has issues with storing the complete register state. This
216 To account for this different POWER9 chips have TM enabled in
219 On POWER9N DD2.01 and below, TM is disabled. ie
222 On POWER9N DD2.1 TM is configured by firmware to always abort a
226 will not occur. If userspace constructs a sigcontext that enables TM
231 On POWER9N DD2.2 and above, KVM and POWERVM emulate TM for guests (as
232 described in commit 4bb3c7a0208f), hence TM is enabled for guests
234 makes heavy use of TM suspend (tsuspend or kernel suspend) will result
236 degradation. Host userspace has TM disabled
242 Linux only runs as a guest. On these systems TM is emulated like on
246 POWER9C DD1.2. Since earlier POWER9 processors don't support TM
257 kernel via some exception, MSR will end up as TM=0 and TS=01 (ie. TM
258 off but TM suspended). Regularly the kernel will want change bits in
260 have SRR0 TM = 0 and TS = 00 (ie. TM off and non transaction) and the
261 resulting MSR will retain TM = 0 and TS=01 from before (ie. stay in