Lines Matching +full:0 +full:x1000
21 reg = <0xfa00000 0x200000>;
28 #size-cells = <0>;
30 cpu@0 {
33 reg = <0>;
93 reg = <0x0 0x0>;
188 interrupts = <GIC_PPI 7 0xf04>;
194 #clock-cells = <0>;
200 #clock-cells = <0>;
207 interrupts = <GIC_PPI 2 0xf08>,
208 <GIC_PPI 3 0xf08>,
209 <GIC_PPI 4 0xf08>,
210 <GIC_PPI 1 0xf08>;
233 reg = <0xf9000000 0x1000>,
234 <0xf9002000 0x1000>;
239 reg = <0xf9011000 0x1000>;
246 reg = <0xfc4bc000 0x1000>;
248 reg = <0xd0 0x18>;
251 reg = <0x440 0x10>;
257 reg = <0xfc4a9000 0x1000>, /* TM */
258 <0xfc4a8000 0x1000>; /* SROT */
269 reg = <0xf9020000 0x1000>;
273 frame-number = <0>;
276 reg = <0xf9021000 0x1000>,
277 <0xf9022000 0x1000>;
283 reg = <0xf9023000 0x1000>;
290 reg = <0xf9024000 0x1000>;
297 reg = <0xf9025000 0x1000>;
304 reg = <0xf9026000 0x1000>;
311 reg = <0xf9027000 0x1000>;
318 reg = <0xf9028000 0x1000>;
325 reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>;
330 reg = <0xf9099000 0x1000>, <0xf9009000 0x1000>;
335 reg = <0xf90a9000 0x1000>, <0xf9009000 0x1000>;
340 reg = <0xf90b9000 0x1000>, <0xf9009000 0x1000>;
345 reg = <0xf9012000 0x1000>;
351 reg = <0xf9088000 0x1000>,
352 <0xf9008000 0x1000>;
357 reg = <0xf9098000 0x1000>,
358 <0xf9008000 0x1000>;
363 reg = <0xf90a8000 0x1000>,
364 <0xf9008000 0x1000>;
369 reg = <0xf90b8000 0x1000>,
370 <0xf9008000 0x1000>;
375 reg = <0xfc4ab000 0x4>;
383 reg = <0xfc400000 0x4000>;
388 reg = <0xfd484000 0x2000>;
393 syscon = <&tcsr_mutex_regs 0 0x80>;
399 reg = <0xfc428000 0x4000>;
404 reg = <0xfd510000 0x4000>;
406 gpio-ranges = <&tlmm 0 0 147>;
415 reg = <0xf995e000 0x1000>;
424 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
437 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
451 reg = <0xfc4cf000 0x1000>,
452 <0xfc4cb000 0x1000>,
453 <0xfc4ca000 0x1000>;
456 qcom,ee = <0>;
457 qcom,channel = <0>;
459 #size-cells = <0>;
470 qcom,ipc = <&apcs 8 0>;