Lines Matching full:cpg
10 #include <dt-bindings/clock/r8a77470-cpg-mssr.h>
35 clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>;
45 clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>;
93 clocks = <&cpg CPG_MOD 402>;
95 resets = <&cpg 402>;
109 clocks = <&cpg CPG_MOD 912>;
111 resets = <&cpg 912>;
124 clocks = <&cpg CPG_MOD 911>;
126 resets = <&cpg 911>;
139 clocks = <&cpg CPG_MOD 910>;
141 resets = <&cpg 910>;
155 clocks = <&cpg CPG_MOD 909>;
157 resets = <&cpg 909>;
170 clocks = <&cpg CPG_MOD 908>;
172 resets = <&cpg 908>;
185 clocks = <&cpg CPG_MOD 907>;
187 resets = <&cpg 907>;
195 cpg: clock-controller@e6150000 { label
196 compatible = "renesas,r8a77470-cpg-mssr";
237 clocks = <&cpg CPG_MOD 407>;
239 resets = <&cpg 407>;
278 clocks = <&cpg CPG_MOD 931>;
280 resets = <&cpg 931>;
292 clocks = <&cpg CPG_MOD 930>;
294 resets = <&cpg 930>;
306 clocks = <&cpg CPG_MOD 929>;
308 resets = <&cpg 929>;
320 clocks = <&cpg CPG_MOD 928>;
322 resets = <&cpg 928>;
334 clocks = <&cpg CPG_MOD 927>;
336 resets = <&cpg 927>;
346 clocks = <&cpg CPG_MOD 704>;
354 resets = <&cpg 704>;
364 clocks = <&cpg CPG_MOD 704>;
367 resets = <&cpg 704>;
381 clocks = <&cpg CPG_MOD 706>;
390 resets = <&cpg 706>;
400 clocks = <&cpg CPG_MOD 706>;
403 resets = <&cpg 706>;
419 clocks = <&cpg CPG_MOD 330>;
421 resets = <&cpg 330>;
433 clocks = <&cpg CPG_MOD 331>;
435 resets = <&cpg 331>;
447 clocks = <&cpg CPG_MOD 326>;
449 resets = <&cpg 326>;
461 clocks = <&cpg CPG_MOD 327>;
463 resets = <&cpg 327>;
493 clocks = <&cpg CPG_MOD 219>;
496 resets = <&cpg 219>;
526 clocks = <&cpg CPG_MOD 218>;
529 resets = <&cpg 218>;
539 clocks = <&cpg CPG_MOD 812>;
541 resets = <&cpg 812>;
551 clocks = <&cpg CPG_MOD 918>;
559 resets = <&cpg 918>;
567 clocks = <&cpg CPG_MOD 917>;
575 resets = <&cpg 917>;
584 clocks = <&cpg CPG_MOD 721>,
585 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
591 resets = <&cpg 721>;
600 clocks = <&cpg CPG_MOD 720>,
601 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
607 resets = <&cpg 720>;
616 clocks = <&cpg CPG_MOD 719>,
617 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
623 resets = <&cpg 719>;
632 clocks = <&cpg CPG_MOD 718>,
633 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
639 resets = <&cpg 718>;
648 clocks = <&cpg CPG_MOD 715>,
649 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
655 resets = <&cpg 715>;
664 clocks = <&cpg CPG_MOD 714>,
665 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
671 resets = <&cpg 714>;
680 clocks = <&cpg CPG_MOD 717>,
681 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
687 resets = <&cpg 717>;
696 clocks = <&cpg CPG_MOD 716>,
697 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
703 resets = <&cpg 716>;
712 clocks = <&cpg CPG_MOD 713>,
713 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
719 resets = <&cpg 713>;
726 clocks = <&cpg CPG_MOD 523>;
728 resets = <&cpg 523>;
736 clocks = <&cpg CPG_MOD 523>;
738 resets = <&cpg 523>;
746 clocks = <&cpg CPG_MOD 523>;
748 resets = <&cpg 523>;
756 clocks = <&cpg CPG_MOD 523>;
758 resets = <&cpg 523>;
766 clocks = <&cpg CPG_MOD 523>;
768 resets = <&cpg 523>;
776 clocks = <&cpg CPG_MOD 523>;
778 resets = <&cpg 523>;
786 clocks = <&cpg CPG_MOD 523>;
788 resets = <&cpg 523>;
798 clocks = <&cpg CPG_MOD 811>;
800 resets = <&cpg 811>;
809 clocks = <&cpg CPG_MOD 810>;
811 resets = <&cpg 810>;
819 clocks = <&cpg CPG_MOD 703>;
823 resets = <&cpg 703>;
831 clocks = <&cpg CPG_MOD 703>;
836 resets = <&cpg 703>;
843 clocks = <&cpg CPG_MOD 703>;
845 resets = <&cpg 703>;
854 clocks = <&cpg CPG_MOD 705>;
858 resets = <&cpg 705>;
866 clocks = <&cpg CPG_MOD 705>;
871 resets = <&cpg 705>;
878 clocks = <&cpg CPG_MOD 705>;
880 resets = <&cpg 705>;
890 clocks = <&cpg CPG_MOD 314>;
896 resets = <&cpg 314>;
904 clocks = <&cpg CPG_MOD 313>;
907 resets = <&cpg 313>;
916 clocks = <&cpg CPG_MOD 312>;
922 resets = <&cpg 312>;
934 clocks = <&cpg CPG_MOD 408>;
937 resets = <&cpg 408>;
945 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
947 resets = <&cpg 724>;
984 clocks = <&cpg CPG_MOD 124>;
987 resets = <&cpg 124>;
1003 clocks = <&cpg CPG_MOD 329>;
1006 resets = <&cpg 329>;