Lines Matching refs:rcc
130 clocks = <&rcc TIM2_K>;
163 clocks = <&rcc TIM3_K>;
197 clocks = <&rcc TIM4_K>;
229 clocks = <&rcc TIM5_K>;
263 clocks = <&rcc TIM6_K>;
281 clocks = <&rcc TIM7_K>;
299 clocks = <&rcc TIM12_K>;
321 clocks = <&rcc TIM13_K>;
343 clocks = <&rcc TIM14_K>;
365 clocks = <&rcc LPTIM1_K>;
393 clocks = <&rcc SPI2_K>;
394 resets = <&rcc SPI2_R>;
418 clocks = <&rcc SPI3_K>;
419 resets = <&rcc SPI3_R>;
441 clocks = <&rcc SPDIF_K>;
454 clocks = <&rcc USART2_K>;
462 clocks = <&rcc USART3_K>;
470 clocks = <&rcc UART4_K>;
478 clocks = <&rcc UART5_K>;
488 clocks = <&rcc I2C1_K>;
489 resets = <&rcc I2C1_R>;
503 clocks = <&rcc I2C2_K>;
504 resets = <&rcc I2C2_R>;
518 clocks = <&rcc I2C3_K>;
519 resets = <&rcc I2C3_R>;
533 clocks = <&rcc I2C5_K>;
534 resets = <&rcc I2C5_R>;
546 clocks = <&rcc CEC_K>, <&rcc CEC>;
554 clocks = <&rcc DAC12>;
579 clocks = <&rcc UART7_K>;
587 clocks = <&rcc UART8_K>;
596 clocks = <&rcc TIM1_K>;
632 clocks = <&rcc TIM8_K>;
667 clocks = <&rcc USART6_K>;
677 clocks = <&rcc SPI1_K>;
678 resets = <&rcc SPI1_R>;
702 clocks = <&rcc SPI4_K>;
703 resets = <&rcc SPI4_R>;
715 clocks = <&rcc TIM15_K>;
742 clocks = <&rcc TIM16_K>;
766 clocks = <&rcc TIM17_K>;
792 clocks = <&rcc SPI5_K>;
793 resets = <&rcc SPI5_R>;
807 resets = <&rcc SAI1_R>;
815 clocks = <&rcc SAI1_K>;
825 clocks = <&rcc SAI1_K>;
839 resets = <&rcc SAI2_R>;
846 clocks = <&rcc SAI2_K>;
856 clocks = <&rcc SAI2_K>;
870 resets = <&rcc SAI3_R>;
877 clocks = <&rcc SAI3_K>;
887 clocks = <&rcc SAI3_K>;
897 clocks = <&rcc DFSDM_K>;
975 clocks = <&rcc DMA1>;
976 resets = <&rcc DMA1_R>;
993 clocks = <&rcc DMA2>;
994 resets = <&rcc DMA2_R>;
1007 clocks = <&rcc DMAMUX>;
1008 resets = <&rcc DMAMUX_R>;
1016 clocks = <&rcc ADC12>, <&rcc ADC12_K>;
1054 clocks = <&rcc SDMMC3_K>;
1056 resets = <&rcc SDMMC3_R>;
1066 clocks = <&rcc USBO_K>;
1068 resets = <&rcc USBO_R>;
1089 clocks = <&rcc IPCC>;
1098 resets = <&rcc CAMITF_R>;
1099 clocks = <&rcc DCMI>;
1106 rcc: rcc@50000000 { label
1107 compatible = "st,stm32mp1-rcc", "syscon";
1151 clocks = <&rcc SYSCFG>;
1159 clocks = <&rcc LPTIM2_K>;
1186 clocks = <&rcc LPTIM3_K>;
1206 clocks = <&rcc LPTIM4_K>;
1220 clocks = <&rcc LPTIM5_K>;
1236 clocks = <&rcc VREF>;
1247 resets = <&rcc SAI4_R>;
1254 clocks = <&rcc SAI4_K>;
1264 clocks = <&rcc SAI4_K>;
1275 clocks = <&rcc TMPSENS>;
1285 clocks = <&rcc HASH1>;
1286 resets = <&rcc HASH1_R>;
1296 clocks = <&rcc RNG1_K>;
1297 resets = <&rcc RNG1_R>;
1305 clocks = <&rcc MDMA>;
1306 resets = <&rcc MDMA_R>;
1317 clocks = <&rcc FMC_K>;
1318 resets = <&rcc FMC_R>;
1354 clocks = <&rcc QSPI_K>;
1355 resets = <&rcc QSPI_R>;
1367 clocks = <&rcc SDMMC1_K>;
1369 resets = <&rcc SDMMC1_R>;
1382 clocks = <&rcc SDMMC2_K>;
1384 resets = <&rcc SDMMC2_R>;
1394 clocks = <&rcc CRC1>;
1409 clocks = <&rcc ETHMAC>,
1410 <&rcc ETHTX>,
1411 <&rcc ETHRX>,
1412 <&rcc ETHCK_K>,
1413 <&rcc ETHSTP>;
1432 clocks = <&rcc USBH>;
1433 resets = <&rcc USBH_R>;
1441 clocks = <&rcc USBH>;
1442 resets = <&rcc USBH_R>;
1453 clocks = <&rcc LTDC_PX>;
1455 resets = <&rcc LTDC_R>;
1467 clocks = <&rcc IWDG2>, <&rcc CK_LSI>;
1477 clocks = <&rcc USBPHY_K>;
1478 resets = <&rcc USBPHY_R>;
1496 clocks = <&rcc USART1_K>;
1506 clocks = <&rcc SPI6_K>;
1507 resets = <&rcc SPI6_R>;
1520 clocks = <&rcc I2C4_K>;
1521 resets = <&rcc I2C4_R>;
1532 clocks = <&rcc RTCAPB>, <&rcc RTC>;
1557 clocks = <&rcc I2C6_K>;
1558 resets = <&rcc I2C6_R>;
1585 clocks = <&rcc GPIOA>;
1596 clocks = <&rcc GPIOB>;
1607 clocks = <&rcc GPIOC>;
1618 clocks = <&rcc GPIOD>;
1629 clocks = <&rcc GPIOE>;
1640 clocks = <&rcc GPIOF>;
1651 clocks = <&rcc GPIOG>;
1662 clocks = <&rcc GPIOH>;
1673 clocks = <&rcc GPIOI>;
1684 clocks = <&rcc GPIOJ>;
1695 clocks = <&rcc GPIOK>;
1716 clocks = <&rcc GPIOZ>;
1738 resets = <&rcc MCU_R>;
1739 st,syscfg-holdboot = <&rcc 0x10C 0x1>;
1740 st,syscfg-tz = <&rcc 0x000 0x1>;