Lines Matching +full:0 +full:x100
9 #define CPU_CLK 0
24 #clock-cells = <0>;
29 ranges = <0x00000000 0x20000000 0x2000>;
33 scu@0 {
35 reg = <0x0 0x100>;
40 reg = <0x600 0x10>;
50 reg = <0x1000 0x1000>, <0x100 0x100>;
56 reg = <0x20100000 0x1000>;
71 #clock-cells = <0>;
76 reg = <0x10000 0x100>;
83 reg = <0x10048 0x4>;
89 reg = <0x10700 0x30>;
97 reg = <0x1fd00 8>;
103 reg = <0x21000 0x200>;
111 reg = <0x21200 0x200>;
119 reg = <0x21400 0x200>;
127 reg = <0x21700 0x100>;
128 #phy-cells = <0>;
134 reg = <0x25400 0x200>;
142 reg = <0x25700 0x100>;
143 #phy-cells = <0>;
149 reg = <0x26000 0x800>;
156 reg = <0x6e000 0x400>;
157 ranges = <0 0x6e000 0x400>;
162 irq0: irq0@0 {
163 reg = <0x000 0x100>;
170 reg = <0x100 0x100>;
177 reg = <0x300 0x100>;