Lines Matching +full:0 +full:xf04
16 arm,hbi = <0x237>;
17 arm,vexpress,site = <0xf>;
36 #size-cells = <0>;
38 cpu@0 {
41 reg = <0>;
53 reg = <0 0x80000000 0 0x40000000>;
61 /* Chipselect 2 is physically at 0x18000000 */
65 reg = <0 0x18000000 0 0x00800000>;
72 reg = <0 0x2b000000 0 0x1000>;
73 interrupts = <0 85 4>;
80 reg = <0 0x2b0a0000 0 0x1000>;
88 reg = <0 0x2b060000 0 0x1000>;
89 interrupts = <0 98 4>;
97 #address-cells = <0>;
99 reg = <0 0x2c001000 0 0x1000>,
100 <0 0x2c002000 0 0x2000>,
101 <0 0x2c004000 0 0x2000>,
102 <0 0x2c006000 0 0x2000>;
103 interrupts = <1 9 0xf04>;
108 reg = <0 0x7ffd0000 0 0x1000>;
109 interrupts = <0 86 4>,
110 <0 87 4>;
117 reg = <0 0x7ffb0000 0 0x1000>;
118 interrupts = <0 92 4>,
119 <0 88 4>,
120 <0 89 4>,
121 <0 90 4>,
122 <0 91 4>;
129 interrupts = <1 13 0xf08>,
130 <1 14 0xf08>,
131 <1 11 0xf08>,
132 <1 10 0xf08>;
137 interrupts = <0 68 4>,
138 <0 69 4>;
148 arm,vexpress-sysreg,func = <1 0>;
150 #clock-cells = <0>;
159 #clock-cells = <0>;
168 #clock-cells = <0>;
177 #clock-cells = <0>;
186 #clock-cells = <0>;
195 #clock-cells = <0>;
202 arm,vexpress-sysreg,func = <2 0>;
213 arm,vexpress-sysreg,func = <3 0>;
220 arm,vexpress-sysreg,func = <4 0>;
227 arm,vexpress-sysreg,func = <12 0>;
234 arm,vexpress-sysreg,func = <13 0>;
244 ranges = <0 0 0 0x08000000 0x04000000>,
245 <1 0 0 0x14000000 0x04000000>,
246 <2 0 0 0x18000000 0x04000000>,
247 <3 0 0 0x1c000000 0x04000000>,
248 <4 0 0 0x0c000000 0x04000000>,
249 <5 0 0 0x10000000 0x04000000>;
252 interrupt-map-mask = <0 0 63>;
253 interrupt-map = <0 0 0 &gic 0 0 4>,
254 <0 0 1 &gic 0 1 4>,
255 <0 0 2 &gic 0 2 4>,
256 <0 0 3 &gic 0 3 4>,
257 <0 0 4 &gic 0 4 4>,
258 <0 0 5 &gic 0 5 4>,
259 <0 0 6 &gic 0 6 4>,
260 <0 0 7 &gic 0 7 4>,
261 <0 0 8 &gic 0 8 4>,
262 <0 0 9 &gic 0 9 4>,
263 <0 0 10 &gic 0 10 4>,
264 <0 0 11 &gic 0 11 4>,
265 <0 0 12 &gic 0 12 4>,
266 <0 0 13 &gic 0 13 4>,
267 <0 0 14 &gic 0 14 4>,
268 <0 0 15 &gic 0 15 4>,
269 <0 0 16 &gic 0 16 4>,
270 <0 0 17 &gic 0 17 4>,
271 <0 0 18 &gic 0 18 4>,
272 <0 0 19 &gic 0 19 4>,
273 <0 0 20 &gic 0 20 4>,
274 <0 0 21 &gic 0 21 4>,
275 <0 0 22 &gic 0 22 4>,
276 <0 0 23 &gic 0 23 4>,
277 <0 0 24 &gic 0 24 4>,
278 <0 0 25 &gic 0 25 4>,
279 <0 0 26 &gic 0 26 4>,
280 <0 0 27 &gic 0 27 4>,
281 <0 0 28 &gic 0 28 4>,
282 <0 0 29 &gic 0 29 4>,
283 <0 0 30 &gic 0 30 4>,
284 <0 0 31 &gic 0 31 4>,
285 <0 0 32 &gic 0 32 4>,
286 <0 0 33 &gic 0 33 4>,
287 <0 0 34 &gic 0 34 4>,
288 <0 0 35 &gic 0 35 4>,
289 <0 0 36 &gic 0 36 4>,
290 <0 0 37 &gic 0 37 4>,
291 <0 0 38 &gic 0 38 4>,
292 <0 0 39 &gic 0 39 4>,
293 <0 0 40 &gic 0 40 4>,
294 <0 0 41 &gic 0 41 4>,
295 <0 0 42 &gic 0 42 4>;
302 ranges = <0 0 0x40000000 0x3fef0000>;
304 interrupt-map-mask = <0 3>;
305 interrupt-map = <0 0 &gic 0 36 4>,
306 <0 1 &gic 0 37 4>,
307 <0 2 &gic 0 38 4>,
308 <0 3 &gic 0 39 4>;