Lines Matching refs:ldr

38 	ldr	r1, =CPU_MASK
40 	ldr	r1, =CPU_CORTEX_A9
52 	ldr	r1, =CPU_MASK
54 	ldr	r1, =CPU_CORTEX_A9
67 	ldr	r1, [r0, #L2X0_R_PHY_BASE]
72 	ldr	r2, [r1, #L2X0_CTRL]
76 	ldr	r1, [r0, #L2X0_R_TAG_LATENCY]
77 	ldr	r2, [r0, #L2X0_R_DATA_LATENCY]
78 	ldr	r3, [r0, #L2X0_R_PREFETCH_CTRL]
85 	ldr	r1, [r0, #L2X0_R_PWR_CTRL]
86 	ldr	r2, [r0, #L2X0_R_AUX_CTRL]