Lines Matching +full:0 +full:xe6150000
18 * The external audio clocks are configured as 0 Hz fixed frequency
24 #clock-cells = <0>;
25 clock-frequency = <0>;
30 #clock-cells = <0>;
31 clock-frequency = <0>;
36 #clock-cells = <0>;
37 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
70 #size-cells = <0>;
72 a53_0: cpu@0 {
74 reg = <0>;
96 L2_CA53: cache-controller-0 {
106 #clock-cells = <0>;
108 clock-frequency = <0>;
114 #clock-cells = <0>;
115 clock-frequency = <0>;
133 #clock-cells = <0>;
134 clock-frequency = <0>;
147 reg = <0 0xe6020000 0 0x0c>;
157 reg = <0 0xe6050000 0 0x50>;
161 gpio-ranges = <&pfc 0 0 18>;
172 reg = <0 0xe6051000 0 0x50>;
176 gpio-ranges = <&pfc 0 32 23>;
187 reg = <0 0xe6052000 0 0x50>;
191 gpio-ranges = <&pfc 0 64 26>;
202 reg = <0 0xe6053000 0 0x50>;
206 gpio-ranges = <&pfc 0 96 16>;
217 reg = <0 0xe6054000 0 0x50>;
221 gpio-ranges = <&pfc 0 128 11>;
232 reg = <0 0xe6055000 0 0x50>;
236 gpio-ranges = <&pfc 0 160 20>;
247 reg = <0 0xe6055400 0 0x50>;
251 gpio-ranges = <&pfc 0 192 18>;
261 reg = <0 0xe6060000 0 0x508>;
267 reg = <0 0xe60f0000 0 0x1004>;
280 reg = <0 0xe6130000 0 0x1004>;
299 reg = <0 0xe6140000 0 0x1004>;
318 reg = <0 0xe6148000 0 0x1004>;
336 reg = <0 0xe6150000 0 0x1000>;
340 #power-domain-cells = <0>;
346 reg = <0 0xe6160000 0 0x0200>;
351 reg = <0 0xe6180000 0 0x0400>;
357 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
364 #thermal-sensor-cells = <0>;
371 reg = <0 0xe61c0000 0 0x200>;
372 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
385 reg = <0 0xe61e0000 0 0x30>;
398 reg = <0 0xe6fc0000 0 0x30>;
411 reg = <0 0xe6fd0000 0 0x30>;
424 reg = <0 0xe6fe0000 0 0x30>;
437 reg = <0 0xffc00000 0 0x30>;
450 #size-cells = <0>;
453 reg = <0 0xe6500000 0 0x40>;
458 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
459 <&dmac2 0x91>, <&dmac2 0x90>;
467 #size-cells = <0>;
470 reg = <0 0xe6508000 0 0x40>;
475 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
476 <&dmac2 0x93>, <&dmac2 0x92>;
484 #size-cells = <0>;
487 reg = <0 0xe6510000 0 0x40>;
492 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
493 <&dmac2 0x95>, <&dmac2 0x94>;
501 #size-cells = <0>;
504 reg = <0 0xe66d0000 0 0x40>;
509 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
517 #size-cells = <0>;
520 reg = <0 0xe66d8000 0 0x40>;
525 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
533 #size-cells = <0>;
536 reg = <0 0xe66e0000 0 0x40>;
541 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
549 #size-cells = <0>;
552 reg = <0 0xe66e8000 0 0x40>;
557 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
565 #size-cells = <0>;
568 reg = <0 0xe6690000 0 0x40>;
579 #size-cells = <0>;
581 reg = <0 0xe60b0000 0 0x15>;
586 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
595 reg = <0 0xe6540000 0 0x60>;
601 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
602 <&dmac2 0x31>, <&dmac2 0x30>;
613 reg = <0 0xe6550000 0 0x60>;
619 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
620 <&dmac2 0x33>, <&dmac2 0x32>;
631 reg = <0 0xe6560000 0 0x60>;
637 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
638 <&dmac2 0x35>, <&dmac2 0x34>;
649 reg = <0 0xe66a0000 0 0x60>;
655 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
666 reg = <0 0xe66b0000 0 0x60>;
672 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
682 reg = <0 0xe6590000 0 0x200>;
685 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
686 <&usb_dmac1 0>, <&usb_dmac1 1>;
699 reg = <0 0xe65a0000 0 0x100>;
713 reg = <0 0xe65b0000 0 0x100>;
727 reg = <0 0xe6700000 0 0x10000>;
756 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
769 reg = <0 0xe7300000 0 0x10000>;
798 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
811 reg = <0 0xe7310000 0 0x10000>;
852 reg = <0 0xe6740000 0 0x1000>;
853 renesas,ipmmu-main = <&ipmmu_mm 0>;
860 reg = <0 0xe7740000 0 0x1000>;
868 reg = <0 0xe6570000 0 0x1000>;
876 reg = <0 0xe67b0000 0 0x1000>;
885 reg = <0 0xec670000 0 0x1000>;
893 reg = <0 0xfd800000 0 0x1000>;
901 reg = <0 0xfe6b0000 0 0x1000>;
909 reg = <0 0xfebd0000 0 0x1000>;
917 reg = <0 0xfe990000 0 0x1000>;
926 reg = <0 0xe6800000 0 0x800>;
963 rx-internal-delay-ps = <0>;
966 #size-cells = <0>;
973 reg = <0 0xe6c30000 0 0x1000>;
989 reg = <0 0xe6c38000 0 0x1000>;
1005 reg = <0 0xe66c0000 0 0x8000>;
1029 reg = <0 0xe6e30000 0 0x8>;
1039 reg = <0 0xe6e31000 0 0x8>;
1049 reg = <0 0xe6e32000 0 0x8>;
1059 reg = <0 0xe6e33000 0 0x8>;
1069 reg = <0 0xe6e34000 0 0x8>;
1079 reg = <0 0xe6e35000 0 0x8>;
1089 reg = <0 0xe6e36000 0 0x8>;
1100 reg = <0 0xe6e60000 0 64>;
1106 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1107 <&dmac2 0x51>, <&dmac2 0x50>;
1117 reg = <0 0xe6e68000 0 64>;
1123 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1124 <&dmac2 0x53>, <&dmac2 0x52>;
1134 reg = <0 0xe6e88000 0 64>;
1140 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1141 <&dmac2 0x13>, <&dmac2 0x12>;
1151 reg = <0 0xe6c50000 0 64>;
1157 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1167 reg = <0 0xe6c40000 0 64>;
1173 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1183 reg = <0 0xe6f30000 0 64>;
1189 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1199 reg = <0 0xe6e90000 0 0x0064>;
1202 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1203 <&dmac2 0x41>, <&dmac2 0x40>;
1208 #size-cells = <0>;
1215 reg = <0 0xe6ea0000 0 0x0064>;
1218 dmas = <&dmac0 0x43>, <&dmac0 0x42>;
1223 #size-cells = <0>;
1230 reg = <0 0xe6c00000 0 0x0064>;
1233 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1238 #size-cells = <0>;
1245 reg = <0 0xe6c10000 0 0x0064>;
1248 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1253 #size-cells = <0>;
1259 reg = <0 0xe6ef4000 0 0x1000>;
1269 #size-cells = <0>;
1273 #size-cells = <0>;
1287 reg = <0 0xe6ef5000 0 0x1000>;
1297 #size-cells = <0>;
1301 #size-cells = <0>;
1317 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1323 * clkout : #clock-cells = <0>; <&rcar_sound>;
1328 reg = <0 0xec500000 0 0x1000>, /* SCU */
1329 <0 0xec5a0000 0 0x100>, /* ADG */
1330 <0 0xec540000 0 0x1000>, /* SSIU */
1331 <0 0xec541000 0 0x280>, /* SSI */
1332 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1355 "ssi.1", "ssi.0",
1358 "src.1", "src.0",
1359 "mix.1", "mix.0",
1360 "ctu.1", "ctu.0",
1361 "dvc.0", "dvc.1",
1373 "ssi.1", "ssi.0";
1377 ctu00: ctu-0 { };
1388 dvc0: dvc-0 {
1389 dmas = <&audma0 0xbc>;
1393 dmas = <&audma0 0xbe>;
1399 mix0: mix-0 { };
1404 src0: src-0 {
1406 dmas = <&audma0 0x85>, <&audma0 0x9a>;
1411 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1416 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1421 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1426 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1431 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1436 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1441 dmas = <&audma0 0x93>, <&audma0 0xb6>;
1446 dmas = <&audma0 0x95>, <&audma0 0xb8>;
1451 dmas = <&audma0 0x97>, <&audma0 0xba>;
1457 ssi0: ssi-0 {
1459 dmas = <&audma0 0x01>, <&audma0 0x02>,
1460 <&audma0 0x15>, <&audma0 0x16>;
1465 dmas = <&audma0 0x03>, <&audma0 0x04>,
1466 <&audma0 0x49>, <&audma0 0x4a>;
1471 dmas = <&audma0 0x05>, <&audma0 0x06>,
1472 <&audma0 0x63>, <&audma0 0x64>;
1477 dmas = <&audma0 0x07>, <&audma0 0x08>,
1478 <&audma0 0x6f>, <&audma0 0x70>;
1483 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1484 <&audma0 0x71>, <&audma0 0x72>;
1489 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1490 <&audma0 0x73>, <&audma0 0x74>;
1495 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1496 <&audma0 0x75>, <&audma0 0x76>;
1501 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1502 <&audma0 0x79>, <&audma0 0x7a>;
1507 dmas = <&audma0 0x11>, <&audma0 0x12>,
1508 <&audma0 0x7b>, <&audma0 0x7c>;
1513 dmas = <&audma0 0x13>, <&audma0 0x14>,
1514 <&audma0 0x7d>, <&audma0 0x7e>;
1523 reg = <0 0xec700000 0 0x10000>;
1552 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1565 reg = <0 0xee000000 0 0xc00>;
1576 reg = <0 0xee020000 0 0x400>;
1586 reg = <0 0xee080000 0 0x100>;
1598 reg = <0 0xee080100 0 0x100>;
1612 reg = <0 0xee080200 0 0x700>;
1624 reg = <0 0xee100000 0 0x2000>;
1636 reg = <0 0xee120000 0 0x2000>;
1648 reg = <0 0xee160000 0 0x2000>;
1660 #address-cells = <0>;
1662 reg = <0x0 0xf1010000 0 0x1000>,
1663 <0x0 0xf1020000 0 0x20000>,
1664 <0x0 0xf1040000 0 0x20000>,
1665 <0x0 0xf1060000 0 0x20000>;
1677 reg = <0 0xfe000000 0 0x80000>;
1680 bus-range = <0x00 0xff>;
1682 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1683 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1684 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1685 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1687 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1692 interrupt-map-mask = <0 0 0 0>;
1693 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1704 reg = <0x0 0xfe000000 0 0x80000>,
1705 <0x0 0xfe100000 0 0x100000>,
1706 <0x0 0xfe200000 0 0x200000>,
1707 <0x0 0x30000000 0 0x8000000>,
1708 <0x0 0x38000000 0 0x8000000>;
1722 reg = <0 0xfe960000 0 0x8000>;
1732 reg = <0 0xfea20000 0 0x7000>;
1742 reg = <0 0xfea28000 0 0x7000>;
1752 reg = <0 0xfe9a0000 0 0x8000>;
1762 reg = <0 0xfe96f000 0 0x200>;
1771 reg = <0 0xfea27000 0 0x200>;
1780 reg = <0 0xfea2f000 0 0x200>;
1789 reg = <0 0xfe9af000 0 0x200>;
1798 reg = <0 0xfeaa0000 0 0x10000>;
1807 #size-cells = <0>;
1811 #size-cells = <0>;
1815 csi40vin4: endpoint@0 {
1816 reg = <0>;
1829 reg = <0 0xfeb00000 0 0x40000>;
1833 clock-names = "du.0", "du.1";
1835 reset-names = "du.0";
1836 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
1842 #size-cells = <0>;
1844 port@0 {
1845 reg = <0>;
1868 reg = <0 0xfeb90000 0 0x20>;
1878 #size-cells = <0>;
1880 port@0 {
1881 reg = <0>;
1897 reg = <0 0xfeb90100 0 0x20>;
1905 #size-cells = <0>;
1907 port@0 {
1908 reg = <0>;
1924 reg = <0 0xfff00044 0 4>;
1931 polling-delay = <0>;
1938 cooling-device = <&a53_0 0 2>;
1970 #clock-cells = <0>;
1971 clock-frequency = <0>;
1976 #clock-cells = <0>;
1977 clock-frequency = <0>;