Lines Matching full:cpg
8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
81 clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
92 clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
148 clocks = <&cpg CPG_MOD 402>;
150 resets = <&cpg 402>;
164 clocks = <&cpg CPG_MOD 912>;
166 resets = <&cpg 912>;
179 clocks = <&cpg CPG_MOD 911>;
181 resets = <&cpg 911>;
194 clocks = <&cpg CPG_MOD 910>;
196 resets = <&cpg 910>;
209 clocks = <&cpg CPG_MOD 909>;
211 resets = <&cpg 909>;
224 clocks = <&cpg CPG_MOD 908>;
226 resets = <&cpg 908>;
239 clocks = <&cpg CPG_MOD 907>;
241 resets = <&cpg 907>;
254 clocks = <&cpg CPG_MOD 906>;
256 resets = <&cpg 906>;
270 clocks = <&cpg CPG_MOD 303>;
273 resets = <&cpg 303>;
289 clocks = <&cpg CPG_MOD 302>;
292 resets = <&cpg 302>;
308 clocks = <&cpg CPG_MOD 301>;
311 resets = <&cpg 301>;
327 clocks = <&cpg CPG_MOD 300>;
330 resets = <&cpg 300>;
334 cpg: clock-controller@e6150000 { label
335 compatible = "renesas,r8a774c0-cpg-mssr";
361 clocks = <&cpg CPG_MOD 522>;
363 resets = <&cpg 522>;
378 clocks = <&cpg CPG_MOD 407>;
380 resets = <&cpg 407>;
389 clocks = <&cpg CPG_MOD 125>;
392 resets = <&cpg 125>;
402 clocks = <&cpg CPG_MOD 124>;
405 resets = <&cpg 124>;
415 clocks = <&cpg CPG_MOD 123>;
418 resets = <&cpg 123>;
428 clocks = <&cpg CPG_MOD 122>;
431 resets = <&cpg 122>;
441 clocks = <&cpg CPG_MOD 121>;
444 resets = <&cpg 121>;
455 clocks = <&cpg CPG_MOD 931>;
457 resets = <&cpg 931>;
472 clocks = <&cpg CPG_MOD 930>;
474 resets = <&cpg 930>;
489 clocks = <&cpg CPG_MOD 929>;
491 resets = <&cpg 929>;
506 clocks = <&cpg CPG_MOD 928>;
508 resets = <&cpg 928>;
522 clocks = <&cpg CPG_MOD 927>;
524 resets = <&cpg 927>;
538 clocks = <&cpg CPG_MOD 919>;
540 resets = <&cpg 919>;
554 clocks = <&cpg CPG_MOD 918>;
556 resets = <&cpg 918>;
570 clocks = <&cpg CPG_MOD 1003>;
572 resets = <&cpg 1003>;
583 clocks = <&cpg CPG_MOD 926>;
585 resets = <&cpg 926>;
597 clocks = <&cpg CPG_MOD 520>,
598 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
605 resets = <&cpg 520>;
615 clocks = <&cpg CPG_MOD 519>,
616 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
623 resets = <&cpg 519>;
633 clocks = <&cpg CPG_MOD 518>,
634 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
641 resets = <&cpg 518>;
651 clocks = <&cpg CPG_MOD 517>,
652 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
658 resets = <&cpg 517>;
668 clocks = <&cpg CPG_MOD 516>,
669 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
675 resets = <&cpg 516>;
684 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
692 resets = <&cpg 704>, <&cpg 703>;
703 clocks = <&cpg CPG_MOD 330>;
705 resets = <&cpg 330>;
717 clocks = <&cpg CPG_MOD 331>;
719 resets = <&cpg 331>;
750 clocks = <&cpg CPG_MOD 219>;
753 resets = <&cpg 219>;
792 clocks = <&cpg CPG_MOD 218>;
795 resets = <&cpg 218>;
834 clocks = <&cpg CPG_MOD 217>;
837 resets = <&cpg 217>;
959 clocks = <&cpg CPG_MOD 812>;
961 resets = <&cpg 812>;
975 clocks = <&cpg CPG_MOD 916>,
976 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
979 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
982 resets = <&cpg 916>;
991 clocks = <&cpg CPG_MOD 915>,
992 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
995 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
998 resets = <&cpg 915>;
1008 clocks = <&cpg CPG_MOD 914>,
1009 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
1012 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
1015 resets = <&cpg 914>;
1030 clocks = <&cpg CPG_MOD 523>;
1032 resets = <&cpg 523>;
1040 clocks = <&cpg CPG_MOD 523>;
1042 resets = <&cpg 523>;
1050 clocks = <&cpg CPG_MOD 523>;
1052 resets = <&cpg 523>;
1060 clocks = <&cpg CPG_MOD 523>;
1062 resets = <&cpg 523>;
1070 clocks = <&cpg CPG_MOD 523>;
1072 resets = <&cpg 523>;
1080 clocks = <&cpg CPG_MOD 523>;
1082 resets = <&cpg 523>;
1090 clocks = <&cpg CPG_MOD 523>;
1092 resets = <&cpg 523>;
1102 clocks = <&cpg CPG_MOD 207>,
1103 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1110 resets = <&cpg 207>;
1119 clocks = <&cpg CPG_MOD 206>,
1120 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1127 resets = <&cpg 206>;
1136 clocks = <&cpg CPG_MOD 310>,
1137 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1144 resets = <&cpg 310>;
1153 clocks = <&cpg CPG_MOD 204>,
1154 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1160 resets = <&cpg 204>;
1169 clocks = <&cpg CPG_MOD 203>,
1170 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1176 resets = <&cpg 203>;
1185 clocks = <&cpg CPG_MOD 202>,
1186 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1192 resets = <&cpg 202>;
1201 clocks = <&cpg CPG_MOD 211>;
1206 resets = <&cpg 211>;
1217 clocks = <&cpg CPG_MOD 210>;
1221 resets = <&cpg 210>;
1232 clocks = <&cpg CPG_MOD 209>;
1236 resets = <&cpg 209>;
1247 clocks = <&cpg CPG_MOD 208>;
1251 resets = <&cpg 208>;
1261 clocks = <&cpg CPG_MOD 807>;
1263 resets = <&cpg 807>;
1289 clocks = <&cpg CPG_MOD 806>;
1291 resets = <&cpg 806>;
1335 clocks = <&cpg CPG_MOD 1005>,
1336 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1337 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1338 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1339 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1340 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1341 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1342 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1343 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1344 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1345 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1346 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1347 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1348 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1351 <&cpg CPG_CORE R8A774C0_CLK_ZA2>;
1364 resets = <&cpg 1005>,
1365 <&cpg 1006>, <&cpg 1007>,
1366 <&cpg 1008>, <&cpg 1009>,
1367 <&cpg 1010>, <&cpg 1011>,
1368 <&cpg 1012>, <&cpg 1013>,
1369 <&cpg 1014>, <&cpg 1015>;
1546 clocks = <&cpg CPG_MOD 502>;
1549 resets = <&cpg 502>;
1567 clocks = <&cpg CPG_MOD 328>;
1569 resets = <&cpg 328>;
1578 clocks = <&cpg CPG_MOD 328>;
1580 resets = <&cpg 328>;
1588 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1592 resets = <&cpg 703>, <&cpg 704>;
1600 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1605 resets = <&cpg 703>, <&cpg 704>;
1614 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1616 resets = <&cpg 703>, <&cpg 704>;
1626 clocks = <&cpg CPG_MOD 314>;
1629 resets = <&cpg 314>;
1638 clocks = <&cpg CPG_MOD 313>;
1641 resets = <&cpg 313>;
1650 clocks = <&cpg CPG_MOD 311>;
1653 resets = <&cpg 311>;
1668 clocks = <&cpg CPG_MOD 408>;
1671 resets = <&cpg 408>;
1694 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1697 resets = <&cpg 319>;
1713 clocks = <&cpg CPG_MOD 319>;
1715 resets = <&cpg 319>;
1724 clocks = <&cpg CPG_MOD 626>;
1726 resets = <&cpg 626>;
1734 clocks = <&cpg CPG_MOD 623>;
1736 resets = <&cpg 623>;
1744 clocks = <&cpg CPG_MOD 622>;
1746 resets = <&cpg 622>;
1754 clocks = <&cpg CPG_MOD 631>;
1756 resets = <&cpg 631>;
1763 clocks = <&cpg CPG_MOD 607>;
1765 resets = <&cpg 607>;
1772 clocks = <&cpg CPG_MOD 603>;
1774 resets = <&cpg 603>;
1781 clocks = <&cpg CPG_MOD 602>;
1783 resets = <&cpg 602>;
1790 clocks = <&cpg CPG_MOD 611>;
1792 resets = <&cpg 611>;
1800 clocks = <&cpg CPG_MOD 716>;
1802 resets = <&cpg 716>;
1832 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1834 resets = <&cpg 724>;
1869 clocks = <&cpg CPG_MOD 727>;
1871 resets = <&cpg 727>;
1898 clocks = <&cpg CPG_MOD 727>;
1900 resets = <&cpg 726>;