Lines Matching +full:0 +full:x0010000
20 * The external audio clocks are configured as 0 Hz fixed frequency
26 #clock-cells = <0>;
27 clock-frequency = <0>;
32 #clock-cells = <0>;
33 clock-frequency = <0>;
38 #clock-cells = <0>;
39 clock-frequency = <0>;
45 #clock-cells = <0>;
46 clock-frequency = <0>;
118 #size-cells = <0>;
146 a57_0: cpu@0 {
148 reg = <0x0>;
163 reg = <0x1>;
177 reg = <0x100>;
192 reg = <0x101>;
205 reg = <0x102>;
218 reg = <0x103>;
229 L2_CA57: cache-controller-0 {
246 CPU_SLEEP_0: cpu-sleep-0 {
248 arm,psci-suspend-param = <0x0010000>;
257 arm,psci-suspend-param = <0x0010000>;
268 #clock-cells = <0>;
270 clock-frequency = <0>;
275 #clock-cells = <0>;
277 clock-frequency = <0>;
283 #clock-cells = <0>;
284 clock-frequency = <0>;
311 #clock-cells = <0>;
312 clock-frequency = <0>;
325 reg = <0 0xe6020000 0 0x0c>;
335 reg = <0 0xe6050000 0 0x50>;
339 gpio-ranges = <&pfc 0 0 16>;
350 reg = <0 0xe6051000 0 0x50>;
354 gpio-ranges = <&pfc 0 32 29>;
365 reg = <0 0xe6052000 0 0x50>;
369 gpio-ranges = <&pfc 0 64 15>;
380 reg = <0 0xe6053000 0 0x50>;
384 gpio-ranges = <&pfc 0 96 16>;
395 reg = <0 0xe6054000 0 0x50>;
399 gpio-ranges = <&pfc 0 128 18>;
410 reg = <0 0xe6055000 0 0x50>;
414 gpio-ranges = <&pfc 0 160 26>;
425 reg = <0 0xe6055400 0 0x50>;
429 gpio-ranges = <&pfc 0 192 32>;
440 reg = <0 0xe6055800 0 0x50>;
444 gpio-ranges = <&pfc 0 224 4>;
454 reg = <0 0xe6060000 0 0x50c>;
459 reg = <0 0xe6150000 0 0x1000>;
463 #power-domain-cells = <0>;
469 reg = <0 0xe6160000 0 0x0200>;
474 reg = <0 0xe6180000 0 0x0400>;
480 reg = <0 0xe6198000 0 0x100>,
481 <0 0xe61a0000 0 0x100>,
482 <0 0xe61a8000 0 0x100>;
495 reg = <0 0xe61c0000 0 0x200>;
501 #size-cells = <0>;
504 reg = <0 0xe6500000 0 0x40>;
509 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
510 <&dmac2 0x91>, <&dmac2 0x90>;
518 #size-cells = <0>;
521 reg = <0 0xe6508000 0 0x40>;
526 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
527 <&dmac2 0x93>, <&dmac2 0x92>;
535 #size-cells = <0>;
538 reg = <0 0xe6510000 0 0x40>;
543 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
544 <&dmac2 0x95>, <&dmac2 0x94>;
552 #size-cells = <0>;
555 reg = <0 0xe66d0000 0 0x40>;
560 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
568 #size-cells = <0>;
571 reg = <0 0xe66d8000 0 0x40>;
576 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
584 #size-cells = <0>;
587 reg = <0 0xe66e0000 0 0x40>;
592 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
600 #size-cells = <0>;
603 reg = <0 0xe66e8000 0 0x40>;
608 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
616 #size-cells = <0>;
620 reg = <0 0xe60b0000 0 0x425>;
625 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
634 reg = <0 0xe6540000 0 0x60>;
640 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
641 <&dmac2 0x31>, <&dmac2 0x30>;
652 reg = <0 0xe6550000 0 0x60>;
658 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
659 <&dmac2 0x33>, <&dmac2 0x32>;
670 reg = <0 0xe6560000 0 0x60>;
676 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
677 <&dmac2 0x35>, <&dmac2 0x34>;
688 reg = <0 0xe66a0000 0 0x60>;
694 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
705 reg = <0 0xe66b0000 0 0x60>;
711 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
721 reg = <0 0xe6590000 0 0x200>;
724 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
725 <&usb_dmac1 0>, <&usb_dmac1 1>;
738 reg = <0 0xe65a0000 0 0x100>;
752 reg = <0 0xe65b0000 0 0x100>;
766 reg = <0 0xe65ee000 0 0x90>;
772 #phy-cells = <0>;
779 reg = <0x0 0xe6601000 0 0x1000>;
788 reg = <0 0xe6700000 0 0x10000>;
822 reg = <0 0xe7300000 0 0x10000>;
856 reg = <0 0xe7310000 0 0x10000>;
889 reg = <0 0xe6740000 0 0x1000>;
890 renesas,ipmmu-main = <&ipmmu_mm 0>;
897 reg = <0 0xe7740000 0 0x1000>;
905 reg = <0 0xe6570000 0 0x1000>;
913 reg = <0 0xff8b0000 0 0x1000>;
921 reg = <0 0xe67b0000 0 0x1000>;
930 reg = <0 0xec670000 0 0x1000>;
938 reg = <0 0xfd800000 0 0x1000>;
946 reg = <0 0xfd950000 0 0x1000>;
954 reg = <0 0xffc80000 0 0x1000>;
962 reg = <0 0xfe6b0000 0 0x1000>;
970 reg = <0 0xfebd0000 0 0x1000>;
979 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1017 #size-cells = <0>;
1023 reg = <0 0xe6e30000 0 8>;
1033 reg = <0 0xe6e31000 0 8>;
1043 reg = <0 0xe6e32000 0 8>;
1053 reg = <0 0xe6e33000 0 8>;
1063 reg = <0 0xe6e34000 0 8>;
1073 reg = <0 0xe6e35000 0 8>;
1083 reg = <0 0xe6e36000 0 8>;
1094 reg = <0 0xe6e60000 0 64>;
1100 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1101 <&dmac2 0x51>, <&dmac2 0x50>;
1111 reg = <0 0xe6e68000 0 64>;
1117 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1118 <&dmac2 0x53>, <&dmac2 0x52>;
1128 reg = <0 0xe6e88000 0 64>;
1134 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1135 <&dmac2 0x13>, <&dmac2 0x12>;
1145 reg = <0 0xe6c50000 0 64>;
1151 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1161 reg = <0 0xe6c40000 0 64>;
1167 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1177 reg = <0 0xe6f30000 0 64>;
1183 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1184 <&dmac2 0x5b>, <&dmac2 0x5a>;
1192 reg = <0 0xe6ef0000 0 0x1000>;
1197 reg = <0 0xe6ef1000 0 0x1000>;
1202 reg = <0 0xe6ef2000 0 0x1000>;
1207 reg = <0 0xe6ef3000 0 0x1000>;
1212 reg = <0 0xe6ef4000 0 0x1000>;
1217 reg = <0 0xe6ef5000 0 0x1000>;
1222 reg = <0 0xe6ef6000 0 0x1000>;
1227 reg = <0 0xe6ef7000 0 0x1000>;
1235 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1241 * clkout : #clock-cells = <0>; <&rcar_sound>;
1245 reg = <0 0xec500000 0 0x1000>, /* SCU */
1246 <0 0xec5a0000 0 0x100>, /* ADG */
1247 <0 0xec540000 0 0x1000>, /* SSIU */
1248 <0 0xec541000 0 0x280>, /* SSI */
1249 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1272 "ssi.1", "ssi.0",
1275 "src.1", "src.0",
1276 "mix.1", "mix.0",
1277 "ctu.1", "ctu.0",
1278 "dvc.0", "dvc.1",
1290 "ssi.1", "ssi.0";
1294 ctu00: ctu-0 { };
1305 dvc0: dvc-0 {
1306 dmas = <&audma1 0xbc>;
1310 dmas = <&audma1 0xbe>;
1316 mix0: mix-0 { };
1321 src0: src-0 {
1323 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1328 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1333 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1338 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1343 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1348 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1353 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1358 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1363 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1368 dmas = <&audma0 0x97>, <&audma1 0xba>;
1374 ssi0: ssi-0 {
1376 dmas = <&audma0 0x01>, <&audma1 0x02>;
1381 dmas = <&audma0 0x03>, <&audma1 0x04>;
1386 dmas = <&audma0 0x05>, <&audma1 0x06>;
1391 dmas = <&audma0 0x07>, <&audma1 0x08>;
1396 dmas = <&audma0 0x09>, <&audma1 0x0a>;
1401 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
1406 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
1411 dmas = <&audma0 0x0f>, <&audma1 0x10>;
1416 dmas = <&audma0 0x11>, <&audma1 0x12>;
1421 dmas = <&audma0 0x13>, <&audma1 0x14>;
1427 ssiu00: ssiu-0 {
1428 dmas = <&audma0 0x15>, <&audma1 0x16>;
1432 dmas = <&audma0 0x35>, <&audma1 0x36>;
1436 dmas = <&audma0 0x37>, <&audma1 0x38>;
1440 dmas = <&audma0 0x47>, <&audma1 0x48>;
1444 dmas = <&audma0 0x3F>, <&audma1 0x40>;
1448 dmas = <&audma0 0x43>, <&audma1 0x44>;
1452 dmas = <&audma0 0x4F>, <&audma1 0x50>;
1456 dmas = <&audma0 0x53>, <&audma1 0x54>;
1460 dmas = <&audma0 0x49>, <&audma1 0x4a>;
1464 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1468 dmas = <&audma0 0x57>, <&audma1 0x58>;
1472 dmas = <&audma0 0x59>, <&audma1 0x5A>;
1476 dmas = <&audma0 0x5F>, <&audma1 0x60>;
1480 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1484 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1488 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1492 dmas = <&audma0 0x63>, <&audma1 0x64>;
1496 dmas = <&audma0 0x67>, <&audma1 0x68>;
1500 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1504 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1508 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1512 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1516 dmas = <&audma0 0xED>, <&audma1 0xEE>;
1520 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1524 dmas = <&audma0 0x6f>, <&audma1 0x70>;
1528 dmas = <&audma0 0x21>, <&audma1 0x22>;
1532 dmas = <&audma0 0x23>, <&audma1 0x24>;
1536 dmas = <&audma0 0x25>, <&audma1 0x26>;
1540 dmas = <&audma0 0x27>, <&audma1 0x28>;
1544 dmas = <&audma0 0x29>, <&audma1 0x2A>;
1548 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
1552 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
1556 dmas = <&audma0 0x71>, <&audma1 0x72>;
1560 dmas = <&audma0 0x17>, <&audma1 0x18>;
1564 dmas = <&audma0 0x19>, <&audma1 0x1A>;
1568 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
1572 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
1576 dmas = <&audma0 0x1F>, <&audma1 0x20>;
1580 dmas = <&audma0 0x31>, <&audma1 0x32>;
1584 dmas = <&audma0 0x33>, <&audma1 0x34>;
1588 dmas = <&audma0 0x73>, <&audma1 0x74>;
1592 dmas = <&audma0 0x75>, <&audma1 0x76>;
1596 dmas = <&audma0 0x79>, <&audma1 0x7a>;
1600 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
1604 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
1608 dmas = <&audma0 0x7F>, <&audma1 0x80>;
1612 dmas = <&audma0 0x81>, <&audma1 0x82>;
1616 dmas = <&audma0 0x83>, <&audma1 0x84>;
1620 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
1624 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
1628 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
1632 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
1641 reg = <0 0xec700000 0 0x10000>;
1670 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1683 reg = <0 0xec720000 0 0x10000>;
1725 reg = <0 0xee000000 0 0xc00>;
1736 reg = <0 0xee020000 0 0x400>;
1746 reg = <0 0xee080000 0 0x100>;
1758 reg = <0 0xee0a0000 0 0x100>;
1770 reg = <0 0xee080100 0 0x100>;
1783 reg = <0 0xee0a0100 0 0x100>;
1797 reg = <0 0xee080200 0 0x700>;
1809 reg = <0 0xee0a0200 0 0x700>;
1820 reg = <0 0xee100000 0 0x2000>;
1832 reg = <0 0xee120000 0 0x2000>;
1844 reg = <0 0xee140000 0 0x2000>;
1856 reg = <0 0xee160000 0 0x2000>;
1868 #address-cells = <0>;
1870 reg = <0x0 0xf1010000 0 0x1000>,
1871 <0x0 0xf1020000 0 0x20000>,
1872 <0x0 0xf1040000 0 0x20000>,
1873 <0x0 0xf1060000 0 0x20000>;
1885 reg = <0 0xfe000000 0 0x80000>;
1888 bus-range = <0x00 0xff>;
1890 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1891 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1892 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1893 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1895 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1900 interrupt-map-mask = <0 0 0 0>;
1901 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1912 reg = <0 0xee800000 0 0x80000>;
1915 bus-range = <0x00 0xff>;
1917 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
1918 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
1919 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
1920 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1922 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1927 interrupt-map-mask = <0 0 0 0>;
1928 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1938 reg = <0 0xfe950000 0 0x200>;
1946 reg = <0 0xfe96f000 0 0x200>;
1954 reg = <0 0xfe9af000 0 0x200>;
1963 reg = <0 0xfea27000 0 0x200>;
1972 reg = <0 0xfea2f000 0 0x200>;
1981 reg = <0 0xfea37000 0 0x200>;
1990 reg = <0 0xfe960000 0 0x8000>;
2001 reg = <0 0xfea20000 0 0x5000>;
2012 reg = <0 0xfea28000 0 0x5000>;
2023 reg = <0 0xfea30000 0 0x5000>;
2034 reg = <0 0xfe9a0000 0 0x8000>;
2044 reg = <0 0xfea80000 0 0x10000>;
2049 #size-cells = <0>;
2053 #size-cells = <0>;
2060 reg = <0 0xfeaa0000 0 0x10000>;
2065 #size-cells = <0>;
2069 #size-cells = <0>;
2078 reg = <0 0xfead0000 0 0x10000>;
2088 #size-cells = <0>;
2089 port@0 {
2090 reg = <0>;
2107 reg = <0 0xfeb00000 0 0x70000>;
2113 clock-names = "du.0", "du.1", "du.2";
2115 reset-names = "du.0", "du.2";
2117 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
2122 #size-cells = <0>;
2124 port@0 {
2125 reg = <0>;
2145 reg = <0 0xfff00044 0 4>;
2153 thermal-sensors = <&tsc 0>;
2194 cooling-device = <&a53_0 0 2>;
2225 #clock-cells = <0>;
2226 clock-frequency = <0>;
2231 #clock-cells = <0>;
2232 clock-frequency = <0>;