Lines Matching +full:armv8 +full:- +full:based
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012,2013 - ARM Ltd
8 * Based on arch/arm/kvm/emulate.c
9 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
32 * The EL passed to this function *must* be a non-secure, privileged mode with
40 * For the SPSR_ELx layout for AArch64, see ARM DDI 0487E.a page C5-429.
41 * For the SPSR_ELx layout for AArch32, see ARM DDI 0487E.a page C5-426.
84 // TODO: TCO (if/when ARMv8.5-MemTag is exposed to guests) in enter_exception64()
89 // See ARM DDI 0487E.a, page D5-2579. in enter_exception64()
92 // SCTLR_ELx.SPAN is RES1 when ARMv8.1-PAN is not implemented in enter_exception64()
93 // See ARM DDI 0487E.a, page D5-2578. in enter_exception64()
99 // See ARM DDI 0487E.a, page D2-2452. in enter_exception64()
102 // See ARM DDI 0487E.a, page D1-2306. in enter_exception64()
105 // See ARM DDI 0487E.a, page D13-3258 in enter_exception64()
110 // See ARM DDI 0487E.a, pages D1-2293 to D1-2294. in enter_exception64()
172 * kvm_inject_dabt - inject a data abort into the guest
188 * kvm_inject_pabt - inject a prefetch abort into the guest
204 * kvm_inject_undefined - inject an undefined instruction into the guest
225 * kvm_inject_vabt - inject an async abort / SError into the guest
231 * Systems with the RAS Extensions specify an imp-def ESR (ISV/IDS = 1) with
232 * the remaining ISS all-zeros so that this error is not interpreted as an
234 * value, so the CPU generates an imp-def value.