Lines Matching refs:mul
70 u32 mul; member
99 int *postdiv, int *mul) in approximate() argument
108 *mul = i; in approximate()
116 int *mul) in calculate() argument
123 *mul = target / tmp_gcd; in calculate()
125 if ((*mul < 1) || (*mul >= 16)) in calculate()
131 if (base / *prediv * *mul / *postdiv != target) { in calculate()
132 approximate(base, target, prediv, postdiv, mul); in calculate()
133 tmp_freq = base / *prediv * *mul / *postdiv; in calculate()
140 *prediv, *postdiv, *mul); in calculate()
169 int mul = ((pll & MUL_MASK) >> MUL_SHIFT) + 1; in tnetd7300_get_clock() local
190 return (base_clock >> (mul / 16 + 1)) / divisor; in tnetd7300_get_clock()
193 product = (mul & 1) ? in tnetd7300_get_clock()
194 (base_clock * mul) >> 1 : in tnetd7300_get_clock()
195 (base_clock * (mul - 1)) >> 2; in tnetd7300_get_clock()
199 if (mul == 16) in tnetd7300_get_clock()
202 return base_clock * mul / divisor; in tnetd7300_get_clock()
208 int prediv, postdiv, mul; in tnetd7300_set_clock() local
226 calculate(base_clock, frequency, &prediv, &postdiv, &mul); in tnetd7300_set_clock()
233 writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll); in tnetd7300_set_clock()
262 int prediv, int postdiv, int postdiv2, int mul, u32 frequency) in tnetd7200_set_clock() argument
267 base, frequency, prediv, postdiv, postdiv2, mul); in tnetd7200_set_clock()
271 writel((mul - 1) & 0xF, &clock->mul); in tnetd7200_set_clock()