1 // SPDX-License-Identifier: GPL-2.0
42 	if (nmi_addr->call_addr)  in install_cpu_nmi_handler()
44 	nmi_addr->magic = NMI_MAGIC;  in install_cpu_nmi_handler()
45 	nmi_addr->call_addr = (void *)nmi_dump;  in install_cpu_nmi_handler()
46 	nmi_addr->call_addr_c =  in install_cpu_nmi_handler()
47 		(void *)(~((unsigned long)(nmi_addr->call_addr)));  in install_cpu_nmi_handler()
48 	nmi_addr->call_parm = 0;  in install_cpu_nmi_handler()
52  * Copy the cpu registers which have been saved in the IP27prom format
58 	struct reg_struct *nr;  in nmi_cpu_eframe_save()  local
61 	/* Get the pointer to the current cpu's register set. */  in nmi_cpu_eframe_save()
62 	nr = (struct reg_struct *)  in nmi_cpu_eframe_save()
74 		pr_cont(" %016lx", nr->gpr[i]);  in nmi_cpu_eframe_save()
87 	pr_emerg("epc   : %016lx %pS\n", nr->epc, (void *)nr->epc);  in nmi_cpu_eframe_save()
89 	pr_emerg("ErrEPC: %016lx %pS\n", nr->error_epc, (void *)nr->error_epc);  in nmi_cpu_eframe_save()
90 	pr_emerg("ra    : %016lx %pS\n", nr->gpr[31], (void *)nr->gpr[31]);  in nmi_cpu_eframe_save()
91 	pr_emerg("Status: %08lx	      ", nr->sr);  in nmi_cpu_eframe_save()
93 	if (nr->sr & ST0_KX)  in nmi_cpu_eframe_save()
95 	if (nr->sr & ST0_SX)  in nmi_cpu_eframe_save()
97 	if (nr->sr & ST0_UX)  in nmi_cpu_eframe_save()
100 	switch (nr->sr & ST0_KSU) {  in nmi_cpu_eframe_save()
115 	if (nr->sr & ST0_ERL)  in nmi_cpu_eframe_save()
117 	if (nr->sr & ST0_EXL)  in nmi_cpu_eframe_save()
119 	if (nr->sr & ST0_IE)  in nmi_cpu_eframe_save()
123 	pr_emerg("Cause : %08lx\n", nr->cause);  in nmi_cpu_eframe_save()
125 	pr_emerg("BadVA : %016lx\n", nr->badva);  in nmi_cpu_eframe_save()
126 	pr_emerg("CErr  : %016lx\n", nr->cache_err);  in nmi_cpu_eframe_save()
127 	pr_emerg("NMI_SR: %016lx\n", nr->nmi_sr);  in nmi_cpu_eframe_save()
153  * Copy the cpu registers which have been saved in the IP27prom format
163 	/* Save the registers into eframe for each cpu */  in nmi_node_eframe_save()
171  * Save the nmi cpu registers for all cpus in the system.
191 	 * Only allow 1 cpu to proceed  in cont_nmi_dump()
198 	 * If a cpu has not responded after 10 sec, send it 1 additional NMI.  in cont_nmi_dump()
200 	 *	- sometimes a MMSC fail to NMI all cpus.  in cont_nmi_dump()
201 	 *	- on 512p SN0 system, the MMSC will only send NMIs to  in cont_nmi_dump()
203 	 *	  NMIed - it depends on how the site chooses to configure.  in cont_nmi_dump()
210 			if (NODEPDA(node)->dump_count == 0)  in cont_nmi_dump()
216 				if (NODEPDA(node)->dump_count == 0) {  in cont_nmi_dump()
217 					cpu = cpumask_first(cpumask_of_node(node));  in cont_nmi_dump()
218 					for (n=0; n < CNODE_NUM_CPUS(node); cpu++, n++) {  in cont_nmi_dump()
219 						CPUMASK_SETB(nmied_cpus, cpu);  in cont_nmi_dump()
224 						SEND_NMI((cputonasid(cpu)), (cputoslice(cpu)));  in cont_nmi_dump()
236 	 * Save the nmi cpu registers for all cpu in the eframe format.  in cont_nmi_dump()