Lines Matching +full:0 +full:x100

26 		#size-cells = <0>;
28 		PowerPC,5121@0 {
30 			reg = <0>;
31 			d-cache-line-size = <0x20>;	/* 32 bytes */
32 			i-cache-line-size = <0x20>;	/* 32 bytes */
33 			d-cache-size = <0x8000>;	/* L1, 32K */
34 			i-cache-size = <0x8000>;	/* L1, 32K */
43 		reg = <0x00000000 0x10000000>;	/* 256MB at 0 */
48 		reg = <0x20000000 0x4000>;
49 		interrupts = <66 0x8>;
58 		reg = <0x30000000 0x20000>;	/* 128K at 0x30000000 */
63 		reg = <0x40000000 0x100000>;	/* 1M at 0x40000000 */
75 		reg = <0x80000020 0x40>;
76 		ranges = <0x0 0x0 0xfc000000 0x04000000>;
81 		#size-cells = <0>;
85 			#clock-cells = <0>;
94 		ranges = <0x0 0x80000000 0x400000>;
95 		reg = <0x80000000 0x400000>;
109 			#address-cells = <0>;
111 			reg = <0xc00 0x100>;
117 			reg = <0x900 0x100>;
123 			reg = <0xa00 0x100>;
124 			interrupts = <79 0x8 80 0x8>;
130 			reg = <0xe00 0x100>;
136 			reg = <0xf00 0x100>;
145 			reg = <0x1000 0x100>;
146 			interrupts = <83 0x8>;
151 			reg = <0x1100 0x100>;
152 			interrupts = <78 0x8>;
157 			reg = <0x1300 0x80>;
158 			interrupts = <12 0x8>;
169 			reg = <0x1380 0x80>;
170 			interrupts = <13 0x8>;
181 			reg = <0x1500 0x100>;
182 			interrupts = <8 0x8>;
192 			#size-cells = <0>;
194 			reg = <0x1700 0x20>;
195 			interrupts = <9 0x8>;
202 			#size-cells = <0>;
204 			reg = <0x1720 0x20>;
205 			interrupts = <10 0x8>;
212 			#size-cells = <0>;
214 			reg = <0x1740 0x20>;
215 			interrupts = <11 0x8>;
222 			reg = <0x1760 0x8>;
227 			reg = <0x2000 0x100>;
228 			interrupts = <42 0x8>;
235 			reg = <0x2100 0x100>;
236 			interrupts = <64 0x8>;
243 			reg = <0x2300 0x80>;
244 			interrupts = <90 0x8>;
255 			reg = <0x2380 0x80>;
256 			interrupts = <91 0x8>;
267 			reg = <0x2400 0x400>;
268 			interrupts = <67 0x8>;
275 			reg = <0x2800 0x800>;
277 			#size-cells = <0>;
285 			reg = <0x2800 0x800>;
287 			interrupts = <4 0x8>;
295 			reg = <0x3000 0x600>;
297 			#size-cells = <0>;
298 			interrupts = <43 0x8>;
308 			reg = <0x4000 0x600>;
310 			#size-cells = <0>;
311 			interrupts = <44 0x8>;
321 			reg = <0xA000 0x1000>;
327 			reg = <0x10000 0x100>;
332 			reg = <0x10100 0x50>;
333 			interrupts = <7 0x8>;
340 			reg = <0x10200 0x100>;
341 			interrupts = <5 0x8>;
351 			reg = <0x11000 0x100>;
352 			interrupts = <40 0x8>;
363 			reg = <0x11100 0x100>;
364 			interrupts = <40 0x8>;
375 			reg = <0x11200 0x100>;
376 			interrupts = <40 0x8>;
387 			reg = <0x11300 0x100>;
388 			interrupts = <40 0x8>;
399 			reg = <0x11400 0x100>;
400 			interrupts = <40 0x8>;
411 			reg = <0x11500 0x100>;
412 			interrupts = <40 0x8>;
423 			reg = <0x11600 0x100>;
424 			interrupts = <40 0x8>;
435 			reg = <0x11700 0x100>;
436 			interrupts = <40 0x8>;
447 			reg = <0x11800 0x100>;
448 			interrupts = <40 0x8>;
459 			reg = <0x11900 0x100>;
460 			interrupts = <40 0x8>;
471 			reg = <0x11a00 0x100>;
472 			interrupts = <40 0x8>;
483 			reg = <0x11b00 0x100>;
484 			interrupts = <40 0x8>;
494 			reg = <0x11f00 0x100>;
495 			interrupts = <40 0x8>;
502 			reg = <0x14000 0x1800>;
503 			interrupts = <65 0x8>;
511 		interrupts = <1 0x8>;
512 		clock-frequency = <0>;
519 		reg = <0x80008500 0x100	/* internal registers */
520 		       0x80008300 0x8>;	/* config space access registers */
521 		bus-range = <0x0 0x0>;
522 		ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
523 			  0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
524 			  0x01000000 0x0 0x00000000 0x84000000 0x0 0x01000000>;