Lines Matching refs:r10
204 mtspr SPRN_SPRG_SCRATCH0, r10
210 mfspr r10, SPRN_SRR0 /* Get effective address of fault */
211 INVALIDATE_ADJACENT_PAGES_CPU15(r10)
212 mtspr SPRN_MD_EPN, r10
215 compare_to_kernel_boundary r10, r10
217 mfspr r10, SPRN_M_TWB /* Get level 1 table */
220 rlwinm r10, r10, 0, 20, 31
221 oris r10, r10, (swapper_pg_dir - PAGE_OFFSET)@ha
225 lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r10) /* Get level 1 entry */
227 mfspr r10, SPRN_MD_TWC
228 lwz r10, 0(r10) /* Get the pte */
229 rlwimi r11, r10, 0, _PAGE_GUARDED | _PAGE_ACCESSED
230 rlwimi r11, r10, 32 - 9, _PMD_PAGE_512K
238 rlwinm r10, r10, 0, ~0x0f00 /* Clear bits 20-23 */
239 rlwimi r10, r10, 4, 0x0400 /* Copy _PAGE_EXEC into bit 21 */
240 ori r10, r10, RPN_PATTERN | 0x200 /* Set 22 and 24-27 */
241 mtspr SPRN_MI_RPN, r10 /* Update TLB entry */
244 0: mfspr r10, SPRN_SPRG_SCRATCH0
251 0: lwz r10, (itlb_miss_counter - PAGE_OFFSET)@l(0)
252 addi r10, r10, 1
253 stw r10, (itlb_miss_counter - PAGE_OFFSET)@l(0)
254 mfspr r10, SPRN_SPRG_SCRATCH0
261 mtspr SPRN_DAR, r10
268 mfspr r10, SPRN_MD_EPN
269 compare_to_kernel_boundary r10, r10
270 mfspr r10, SPRN_M_TWB /* Get level 1 table */
272 rlwinm r10, r10, 0, 20, 31
273 oris r10, r10, (swapper_pg_dir - PAGE_OFFSET)@ha
276 lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r10) /* Get level 1 entry */
279 mfspr r10, SPRN_MD_TWC
280 lwz r10, 0(r10) /* Get the pte */
288 rlwimi r11, r10, 0, _PAGE_GUARDED | _PAGE_ACCESSED
289 rlwimi r11, r10, 32 - 9, _PMD_PAGE_512K
298 rlwimi r10, r11, 0, 24, 27 /* Set 24-27 */
299 mtspr SPRN_MD_RPN, r10 /* Update TLB entry */
303 0: mfspr r10, SPRN_DAR
311 0: lwz r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0)
312 addi r10, r10, 1
313 stw r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0)
314 mfspr r10, SPRN_DAR
329 andis. r10,r9,SRR1_ISI_NOPT@h
355 andis. r10,r5,DSISR_NOHPTE@h
360 li r10,RPN_PATTERN
361 mtspr SPRN_DAR,r10 /* Tag DAR, to be used in DTLB Error */
394 mtcr r10
395 mfspr r10, SPRN_SPRG_SCRATCH0
402 mtspr SPRN_SPRG_SCRATCH0, r10
403 lwz r10, (instruction_counter - PAGE_OFFSET)@l(0)
404 addi r10, r10, -1
405 stw r10, (instruction_counter - PAGE_OFFSET)@l(0)
406 lis r10, 0xffff
407 ori r10, r10, 0x01
408 mtspr SPRN_COUNTA, r10
409 mfspr r10, SPRN_SPRG_SCRATCH0
424 mtspr SPRN_M_TW, r10
426 mfspr r10, SPRN_SRR0
427 mtspr SPRN_MD_EPN, r10
428 rlwinm r11, r10, 16, 0xfff8
434 tophys(r11, r10)
446 rlwimi r11, r10, 0, 32 - PAGE_SHIFT, 31
451 xoris r10, r11, 0x7c00 /* check if major OP code is 31 */
452 rlwinm r10, r10, 0, 21, 5
453 cmpwi cr1, r10, 2028 /* Is dcbz? */
455 cmpwi cr1, r10, 940 /* Is dcbi? */
457 cmpwi cr1, r10, 108 /* Is dcbst? */
459 cmpwi cr1, r10, 172 /* Is dcbf? */
461 cmpwi cr1, r10, 1964 /* Is icbi? */
463 141: mfspr r10,SPRN_M_TW
468 rlwimi r11, r10, 0, 32 - PAGE_SHIFT_8M, 31
471 144: mfspr r10, SPRN_DSISR
472 rlwinm r10, r10,0,7,5 /* Clear store bit for buggy dcbst insn */
473 mtspr SPRN_DSISR, r10
475 mfctr r10
476 mtdar r10 /* save ctr reg in DAR */
477 rlwinm r10, r11, 24, 24, 28 /* offset into jump table for reg RB */
478 addi r10, r10, 150f@l /* add start of table */
479 mtctr r10 /* load ctr with jump address */
480 xor r10, r10, r10 /* sum starts at zero */
483 add r10, r10, r0 ;b 151f
484 add r10, r10, r1 ;b 151f
485 add r10, r10, r2 ;b 151f
486 add r10, r10, r3 ;b 151f
487 add r10, r10, r4 ;b 151f
488 add r10, r10, r5 ;b 151f
489 add r10, r10, r6 ;b 151f
490 add r10, r10, r7 ;b 151f
491 add r10, r10, r8 ;b 151f
492 add r10, r10, r9 ;b 151f
495 add r10, r10, r12 ;b 151f
496 add r10, r10, r13 ;b 151f
497 add r10, r10, r14 ;b 151f
498 add r10, r10, r15 ;b 151f
499 add r10, r10, r16 ;b 151f
500 add r10, r10, r17 ;b 151f
501 add r10, r10, r18 ;b 151f
502 add r10, r10, r19 ;b 151f
503 add r10, r10, r20 ;b 151f
504 add r10, r10, r21 ;b 151f
505 add r10, r10, r22 ;b 151f
506 add r10, r10, r23 ;b 151f
507 add r10, r10, r24 ;b 151f
508 add r10, r10, r25 ;b 151f
509 add r10, r10, r26 ;b 151f
510 add r10, r10, r27 ;b 151f
511 add r10, r10, r28 ;b 151f
512 add r10, r10, r29 ;b 151f
513 add r10, r10, r30 ;b 151f
514 add r10, r10, r31
528 stw r10, DAR(r11)
529 mfspr r10, SPRN_DSISR
530 stw r10, DSISR(r11)
532 mtdar r10 /* save fault EA to DAR */
534 mfspr r10,SPRN_M_TW
539 add r10, r10, r11 /* add it */
543 add r10, r10, r11 /* add it */
662 lis r10, MD_TWAM@h
663 mtspr SPRN_MD_CTR, r10 /* remove PINNED DTLB entries */
677 oris r12, r10, MD_RSV4I@h
682 li r10, MI_PS8MEG | _PMD_ACCESSED | MI_SVALID
689 mtspr SPRN_MI_TWC, r10
694 mtspr SPRN_MD_TWC, r10
725 mfmsr r10
728 rlwinm r0, r10, 0, ~MSR_RI
820 mtspr SPRN_SRR1, r10